Mixed-Signal simulation using SpectreVerilog

[mcjackson_hxw]

spectreverilog tutorial

I'm a beginner of spectreVerilog. Could you answer me a question, please?
In cadence, I want to simulate a digital circuit (digital filter) using spectreVerilog.
The verilog description contains many modules( I use Modelsim to write it).
But in cadence multi-module in a "functional" view is forbidden. How could I solve it?


A spectreVerilog tutorial is available, and I can email it to you if you need!

 

[piao]

how to use spectreverilog

Usually I split the code and make a symbol for each sub-block and create a schematic view to connect all the blocks.

thus you can use that tool. This is just a workaround.

 

[yibinhsieh]

schematic to spectreverilog

You can use the verilogin command in Cadence and then you can build the functional view.

Yibin.

 

[eng_Semi]

Usually I split the code and make a symbol for each sub-block and create a schematic view to connect all the blocks.

I agree with piao, as this is more organized to have each module in a file and represented by a block. It is a very powerful tool, as it is so easy to troubleshoot any error occurs. Try it !!