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Mix Analog and Digital design verification??

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vcs + nanosim

&

Hsipce
 

c@dence spectre/-S, can do this job, but no good in speed
 

I use hsim to simulate the mix signal design.

Spice is used for the analog part ,the netlist is adopted by digital part.And Hsim can select simulation accuracy level for every model. For all the digital part I use the lowest accruacy level ,then the simulation is fast.

The vector files are all coming from the digtial part simulation. when we simulation the digital part ,we write the input signals' value to a file according to the hsim's manul,then we can use this file to run hsim.

I dont know how to integrate the hsim and nc-sim .Who can give me some advise ?
 

Hi
There's a book <system on chip verification> ,it has a chapter talking about mix analog and digtal design verification.
zhpy
 

There's a book <system on chip verification> ,it has a chapter talking about mix analog and digtal design verification.
In this book, it is very simple about AMS simulation.As the same time, it only explains verilogA and verilog simulation.

I just know mentor have a very good solution about AMS simulation.The platform is anacad.This software can simulate analog portion in eldo(spice model,maybe other format) and digital portion in modelsim.Thus we can start simulation at the behavial phase to find out mistake.
 

where can I find the help document of hsim?,thanks!
 

seperated verification is better,
mix-simulaiton: vcs+nanosim.
 

This is the manual for nanosim + vcs ..
YOu can ref for more detail before you using it .

You can contact them for more detail ..
hope help .
 

If I have verilog code for digital part and Verilog code for analog part, what is the easiest tool for co-simulation? thanks
 

many tools can fit your work, VCS+NS shoule be popular, you can run your dg with vcs and analog with nanosim, or config both at spice level
 

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