Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Minimum feedback optocoupler current for flyback smps?

Status
Not open for further replies.
T

treez

Guest
With the FL6300 flyback smps control chip, the optocoupler is connected to the FB pin, and the FB pin is said to have an input impedance of 5Kohms.

Does this mean that the opto transistor must be set up so that it can draw at least 1 milliamp out of the FB pin?.....because otherwise, if it could not draw at least this current, then the optocoupler would not be able to reduce the power throughput of the flyback sufficiently in times of light loading?

FL6300 DATASHEET
https://www.fairchildsemi.com/datasheets/FL/FL6300A.pdf
 

Hi,

Yes.

Klaus
 
  • Like
Reactions: treez

    T

    Points: 2
    Helpful Answer Positive Rating
1 mA is just enough to start an led illuminating.

--------------------------------

Anyway that's how it is when I've tested visible-light led's, although I have not observed what happens inside an optocoupler.
 
  • Like
Reactions: treez

    T

    Points: 2
    Helpful Answer Positive Rating
Hi,

The 1mA is at the output of a optocoupler,
But if the optocoupler has a transfer rate of 100%,, then it is also the LED current.

******
Maybe the human eye detects the light starting from 1mA LED current (i think it is far below 1mA, but it depends on surrounding brightness) but optocouplers for linear coupling work magnitudes below 1mA.

Klaus
 
  • Like
Reactions: treez

    T

    Points: 2
    Helpful Answer Positive Rating
Does this mean that the opto transistor must be set up so that it can draw at least 1 milliamp out of the FB pin?.....

Similar, but may be more than 1 mA. The question is exactly answered in the datasheet. It says that the optocoupler must provide worst case 2 mA output current. You'll calculate the minimal LED current by putting in the minimum specified CTR at 2 mA output current.

I believe you can answer the question yourself by 1. reading and 2. thinking.
 
  • Like
Reactions: treez and KlausST

    KlausST

    Points: 2
    Helpful Answer Positive Rating
    T

    Points: 2
    Helpful Answer Positive Rating
Thanks, the reason we need to clarify this is because we have a maximum of 1mA which can flow in the opto-diode, and the FOD817 opto datasheet doesnt give the CTR below 1mA....but appears to suggest that it gets very low.......

Certianly figure 2, page 6 of the following CNY17-3 datasheet shows that CTR drops away extremely fast when the opto-diode current goes below 1mA....

CNY17-2 opto datasheet
https://media.digikey.com/pdf/Data Sheets/Fairchild PDFs/CNY17x, CNY17Fx, MOC810x.pdf

FOD817 opto coupler datasheet
https://www.farnell.com/datasheets/1563587.pdf

The thing is, if an optocoupler carries 1mA when in service, and its running 12 hrs per day 365 days per year, how much will the CTR deteriorate over say 5 years?...will the deterioration be very little due to the lowness of the optodiode current?
 

Hi,

In an industrial application with 24 hours/day 365 days i used CNY17.
Although used below the standard operating range and without spikes or so they lost CTR to below 10% of the given CTR within 6 years.Application failed. Big dislike.

Klaus
 
  • Like
Reactions: treez

    T

    Points: 2
    Helpful Answer Positive Rating
Thanks, thats a dramatic reduction in CTR, but given that we are running so little current in our opto diode, (about 1mA) i wonder if we can say that we will not see much degradation of opto current with time?
 

It says that the optocoupler must provide worst case 2 mA output current

Thanks, yes i saw that..on page 5 of the datasheet it does indeed say "2mA"....However, the minimum pull-up resistance to the VREF is 3kohms...and the reference voltage is 3.9V in such a case, the opto would have to drop (3.9-0.8) = 3.1V across the 3K internal pullup, so that’s a opto transistor current of 3.1/3000 = 1.3mA , which is nowhere near 2mA, so where are they getting the “2mA" from?
 

Thanks, yes i saw that..on page 5 of the datasheet it does indeed say "2mA"....However, the minimum pull-up resistance to the VREF is 3kohms...and the reference voltage is 3.9V in such a case, the opto would have to drop (3.9-0.8) = 3.1V across the 3K internal pullup, so that’s a opto transistor current of 3.1/3000 = 1.3mA , which is nowhere near 2mA, so where are they getting the “2mA" from?

CTR of the opto will follow a bathtub curve for rate of change with low current and at high current a linear drop per year, as all LEDs have an Arhenius curve which is why they have unwritten LM70 specs or 30% drop over time vs Tj. Initial drop in bathtub curve is due to nano-impurities burned off varies with epi-quality.

photo diodes have no similar aging.

LEDs have a non-linear excitation threshold below 1-2 mA which is quality controlled in the epi-phase production due to ppm impurities, which accounts for rapid drop in CTR and wide variation.

So for undocumented reasons, you would be well advised to use >1.5 mA for reliability margins. If 2mA is recommended, use it.
 
  • Like
Reactions: treez

    T

    Points: 2
    Helpful Answer Positive Rating
Another point about the FL6300A, is that it has a 18V zener clamping its gate drive voltage. This 18V zener is connected directly to the VDD pin of FL6300A...so why does the "absolute maximum" section say that VDD can go up to 30V?......-if you put 30V on an 18V zener you will get smoke...surely, the datasheet should say maximum voltage allowable on the VDD pin is 18V and no more?
 

Another point about the FL6300A, is that it has a 18V zener clamping its gate drive voltage. This 18V zener is connected directly to the VDD pin of FL6300A...so why does the "absolute maximum" section say that VDD can go up to 30V?......-if you put 30V on an 18V zener you will get smoke...surely, the datasheet should say maximum voltage allowable on the VDD pin is 18V and no more?

Let's assume the zener is tiny and rated for 0.1W . It may have an ESR~ 10 Ohms when saturated and thus give rise to a higher voltage when pulsed. Pd=VI t*f where t*f is the pulse duty cycle.
 
  • Like
Reactions: treez

    T

    Points: 2
    Helpful Answer Positive Rating
Please may I also add this other question about the FL6300A PWM controller IC?.....On page 11 (top left), It says that the FET switch current limit voltage is “VLIMIT = (VFB-1.2)/3”…However, this is not so, because it fails to account for the slope compensation, which on page 7, is said to be a ramp which starts from 0.1V and build up to 0.3V after 45us.
So why have they not included the slope compensation effect, and also, why is there slope compensation in a boundary conduction mode flyback?

- - - Updated - - -

Let's assume the zener is tiny and rated for 0.1W . It may have an ESR~ 10 Ohms when saturated and thus give rise to a higher voltage when pulsed. Pd=VI t*f where t*f is the pulse duty cycle.


So in this case, if say the supply was 20V, then there would be a current of 18V/10R = 1.8Amps in the zener, which it certainly wouldn’t be rated for. And "V.I.t.f " for our flyback would be 20*1.8*0.2 = 7.2W…that surely means smoke?
 

This 18V zener is connected directly to the VDD pin of FL6300A...
No it isn't. It's only driven by a tiny pre-driver.
 
  • Like
Reactions: treez

    T

    Points: 2
    Helpful Answer Positive Rating
thanks, yes but that pre-driver is directly connected to vdd, (as per page 2 of FL6300 datasheet) and it can't be very resistive as its supplying the two-fet driver stage...so that zener will surely get zapped if vdd is 20v?
 

I guess your suggestion would be a bad implementation.

Change design to insert diode and 430Ω, 3216 smd to feed Vdd. The low ESR of the storage Caps on Vdd ensures low Gate drive impedance for for a duration extended by this external R.
 
  • Like
Reactions: treez

    T

    Points: 2
    Helpful Answer Positive Rating
Thanks, i see that you are suggesting an RC filter to the VDD pin.....obviously still allowing the vdd caps to give low impedance to the gate driver.........i believe that with a 20v supply, your RC filter is the only way forward, unless we regulate the 20v down to say 15v, and then feed that direct to the vdd pin......woops, make that 17v as below 16v and the IC never starts up.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top