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Min Cap value for SC filter

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rampat

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What is the min cap value that can be used in SC filter design,so that cap variation are negligible in 0.18u CMOS tech?
 

Hi,
It completely depends on the mismatch error that could be tolerated by the circuit and is defined by a graph which is related with the technology used. But remember that as the cap value decreases the mismatch error increases. So the minimum cap value is defined for a tolerable mismatch error. Here is the graph for the 0.18 process.
 

Also, your noise spec might determine this (kT/C)
 

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