Microblaze soft processor core query

[Sunayana Chakradhar]

Hello All,

I am trying to synthesize and implement a soft microblaze core to know the approximate resource utilization on my Zynq FPGA. I am following the document and video from xilinx mentioned in the link below.

https://www.youtube.com/watch?v=VjYdNIOyRcE

https://www.xilinx.com/support/docu...3_1/ug940-vivado-tutorial-embedded-design.pdf

https://www.xilinx.com/support/docu..._notes/xapp1093-amp-bare-metal-microblaze.pdf

What I dont understand is why have they taken a AXI UART and AXI GPIO IP core in this design. Are these same as the AXI UART that connect to Zynq PS?

Are these used to connect to external UART modules or do they behave like a internal AXI bus to connect microblaze to Zynq. Please clarify.

 

[dpaul]

What I dont understand is why have they taken a AXI UART and AXI GPIO IP core in this design.

In my opinion Xilinx wants to push their design connection automation software. In the #2 pdf you can see most of the flows uses the .bd format. Hence they must standardize all their IP interfaces for a smooth interconnect and they are using the AXI in most cases.

Are these same as the AXI UART that connect to Zynq PS?

You can easily compare in both cases the IP versions and the interface signals to get your answer.

Are these used to connect to external UART modules or do they behave like a internal AXI bus to connect microblaze to Zynq.

I didn't understand this!

 

[Sunayana Chakradhar]

Thanks a lot dpaul. What i meant was... I want to know if axi uart in this case is used to connect microblaze to PS like a amba axi bus or is it a external uart module that can connect to another chip by bringing the pins on the board

 

[dpaul]

I want to know if axi uart in this case is used to connect microblaze to PS like a amba axi bus or is it a external uart module that can connect to another chip by bringing the pins on the board

Without looking into the details of the PDFs you have posted...
An UART in most cases is used for off-chip communication when the data rate is not demanding, e.g. when the logic inside the FPGA is communicating with a PC.
For intra-chip communication (e.g.- data transfer between an Ethernet MAC core and a DMA engine) you may use a high performance bus system, e.g. AMBA AXI.

So referring to your query, you would use an AXI bus to connect a uBlaze to the PS. An UART also connected to the uBlaze (via an AXI interface) can be used to communicate with the outside world.