Method for DFT of SRAM

[greensand]

is there any good method for DFT of SRAM.
mostly, BIST is the choise.
But i have not tools and time to realize it.
How about the boundary scan chains?
is it too time-consuming?
My SRAM has 1Mbit.
Hope for any good sugestions.

 

[jitendra]

Re: about DFT for SRAM

Hi,
For testing memory BIST is most preferable method. In fact I have not heard of any other industry standard method as such to test memory.
One method which is used is functional vector generation. In this method vectors are used to write into memory and data is read from this memory which are used for signature verification. This is similar to the functional testing.

Hope it helps.

Regards,
jitendra

 

[greensand]

Re: about DFT for SRAM

Hi, jitendra. Thank you.
BIST is popular for Memory test. But i have no tools to do it and i have no experience to realize it by myself.
the vector verification is used to function simulation, i think.
so i will use scan chain to do partial test on wafer.
I am not sure whether it's time consuming and feasible.

 

[xworld2008]

about DFT for SRAM

I think you should use BIST to test memory, it is big. And some times we write BIST logic model by ourself.

 

[jitendra]

Re: about DFT for SRAM

Hi,
Scan chain will not be helpful in testing memory. Basic aim is to check manufacturing defects in memory. In BIST we write some data into memory and read back the same address. So we make sure that read write operations are happening properly.
As already suggested, you can design your own bist controller and wrapper logic for memories.
Please check the attached diagram.
You need to write the Bist controller and the input mux for memory. Select line for memory will be BIST_ENABLE. When BIST_ENABLE is '0' (deactivated) normal functional controller will talk to memory.
When BIST_ENABLE is '1' (activated) BIST controller will write into memory and read back the data. BIST controller logic should include verification logic to match the written data and data read from memory.

Regards,
Jitendra

 

[greensand]

about DFT for SRAM

Thank you very much, Jitendra.
I will try bist on your suggestion.
I will try to write bist logic by myself at fisrt.
best regards,
greensand

 

[p_shinde]

Re: about DFT for SRAM

bist.doc.....is empty, isnt it?


if anyone has it pls upload it...

thanks!!!
Prasad

 

[vv_p]

about DFT for SRAM

SRAM testing with scan method is much time wasting. Because each write/read operation for each address need a serial shift operation. I think use function pattern is better solution.

 

[BigDogBear]

about DFT for SRAM

Why not try DFTAdvisor/Flextest from Mentor Graphics, if you didn't buy this DFT Tools, you can ask a trial version to try your test, generally they maybe satisfy your requirement. I had used Flextest to do the DFT for a DSP chip with on-chip 4-Mbit embedded SRAM. Good Luck!

 

[yp0716]

about DFT for SRAM

I suggest you write a memory bist circuit ,you can study the march b arithmetic, the arithmetic is not very hard, I think.