Metal & Via Resistance and Capacitance

[kumar_eee]

If I choose the higher metal layer for my routing, the resistance will be less compared to the lower metals. Is it because of the metal area? What about the capacitance?

Similarly, if I convert all the single Via into Multi-cut via, what will happen to the Via resistance & capacitance?

 

[phoenixpavan]

Hi Kumar,

Yes the Area for higher metal layers is high as well as the current density...these values will be almost double when compared with other metal layers..

Multi-cut vias are a DFM technique to increase the yield of the process...please refer
https://www.edaboard.com/threads/201441/

cheers,

 

[jeevan.life]

Actually It is not because of the area..If you check the thickness of the upper level metals you will find that they are thicker compared to lower level metals. So resistance decreases.

 

[kumar_eee]

Hi Jeevan,
Where can I find the metal thickness details? May be in the DRC document provided by the Fab?

 

[jeevan.life]

Hi Kumar

If you have the PDK from the foundry you can find all these info.

 

[nav_vlsi]

Hi Jeevan,

just a small update in ur answer. It would be better to say increase in "Area" rather that saying only increase in "thickness" alone.

here is my theory, prove me if i am wrong

Resistance R = (Rho * L ) / A
Rho --> Electrical resistivity
L = length of conductor
A = Area of cross-sectional area of the conductor

Now in case of lower Metal layer A = W * T = width of metal * Thickness

In higher metal layers A1 = W1 * T1
W1 > W --> min width of higher metal layer are higher than lower metal layer
T1 > T --> Thickness of higher metal layer are higher than lower metal layer
so A1 > A

now R = (Rho * L ) / A1
since A1 is increasing , Resistance will be decreasing.

please note that its not only increase in T that is impacting ,also increase in W is also a significant factor.
also if u go by sheer number, the value of (T1-T) < (W1-W)

 

[jeevan.life]

Obviously increase in width increases area....You are right........

 

[kumar_eee]

Hi nav_vlsi,
Thanks a lot for the detailed explanation. I've verified the Metal minimum width & Thickness as well.

The minimum metal width is same for almost all the metals except M1 ( M1 is little less compare to other metal layers). But the Metal thickness varies for each metal layer. Thus, the highest metal layer, less resistance due to increase in metal thickness.

In case anyone interested, they can verify the same in Technology LEF file.

Thanks a lot once again.