Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

measuring kickback noise in a comparator

Status
Not open for further replies.

jayapraksh

Newbie level 6
Joined
May 19, 2015
Messages
12
Helped
1
Reputation
2
Reaction score
1
Trophy points
3
Activity points
67
Hai all,
I am designing a dynamic comparator, how can I measure the kickback noise in its input? Is there any circuits for that?
 

I don't have a circuit per se. Your quantity of interest is
the charge (and probably at multiple common-mode points
unless you have a very constrained application, such as an
always-ground-referred (-) input).

You would need to comprehend the application source
impedance and stray capacitance, if you want realism and
accuracy.

I would set up a very low input capacitance op amp in a
noninverting configuration, "sniffing" the input of interest
in a moderately high gain (A=100?) against a low-passed
image of that same input so you can measure at the op amp
output for step voltage. Your kickback charge is then
Ctotal*Vstep after the amp has settled (but some of the
input states might bleed the kick-charge quickly and you
might need to forego DC accuracy, for transient-following -
in this case, perhaps a low-C FET follower and calibrate it
yourself, using a charge injection network such as a 1pF
cap from a pulse gen).
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top