meaning of "metal options"

[learning_curve]

Can anybody help me understand what "metal option"
or a "metal only change" means with regard to analog/digital layout?

 

[mspagon]

I don't have much layout experience but I presume that when a modification needs to be made to a design a "metal-only change" means that the modification will result in only changing the upper metal layers and not changing the base layers such as nwell and substrate.

However, could someone else answer a further question?! Why would it matter if the person changed the base layers for a lower level macro block if it is NOT used repeatedly in the design and it does NOT change the location of the pins and would not affect the LEF DEF or whatever it's called messing up the integration teams auto-router?

 

[timof]

Can anybody help me understand what "metal option"
or a "metal only change" means with regard to analog/digital layout?

Within the same process technology, back-end-of-line (BEOL) stack can contain different number of metal layers (for example, three or four), the top metal may be made of Al or Cu, the top metal may have different thickness, etc. All these different variants of the same process are called "metal options".

 

[erikl]

... when a modification needs to be made to a design a "metal-only change" means that the modification will result in only changing the upper metal layers and not changing the base layers such as nwell and substrate.

Right. In this context, a "metal-only change" may mean an (as an option) anticipated, relatively simple change of the top-most metal pattern - which - in its simplest form - may be accomplished by a laser cut through the passivation layer and the top-most metal in order to interrupt a metal wire connection. It's also possible to connect 2 adjacent top-metal structures by an ion beam fill-up operation.

One more possibility for a "metal-only change" is the - also anticipated - top-metal change by a new production run with only the top-metal mask (and, possibly, the associated via mask) change. The cost of changing just 1 or 2 mask(s) together with a new prototype run of course is much less than a new full mask change run. If such a mask change is actually anticipated before, one or more wafers could have been set on hold before finishing the last (or 2 last) litho/etch steps and then - if necessary - been run with the changed mask(s).

However, could someone else answer a further question?! Why would it matter if the person changed the base layers for a lower level macro block if it is NOT used repeatedly in the design and it does NOT change the location of the pins and would not affect the LEF DEF or whatever it's called messing up the integration teams auto-router?

It wouldn't matter for the design concerned, but it would need a further full-mask prototype run with probably the same cost as the previous run (s. above).

 

[dick_freebird]

I do this almost all the time; there is, besides the simple
mask cost, the cycle time impact of an all-levels change.
I will have the production control people hold some portion
of the lot at a safe waypoint prior to my upper metal
layers, having planned to make things maximally rewirable
using those upper layers.

The difference can be two months on a standard cycle
time wafer lot. Sometimes they resist doing this on a
"hot lot" but peeling off and storing half of them does
not really interfere with anything.

 

[oermens]

"metal only change" may refer to a BEOL respin, you can also do a base layer respin which affects transistors and FEOL passives. see link below

**broken link removed**

 

[mjoyner]

in my 15 years of laying out cmos imagers the convention has always been


Metal option - BEOL configurations, metal layers, special metal only caps, copper top metal, etc.

Metal change only- partial mask set, rev'ing the database and appropriate masks