Hi, I have given this answer a while ago, but I would again write(cut+paste) it here:
Hold time does not count towards the frequency of operation.
Fmax = 1/(Tsu+Tpd+Ttc)
If you look at a cmos circuit of a flip flop, then you will see that Tpd, that is propagation delay of an FF, i.e delay from Clock to Q output, is always greater than hold time. In fact it can be shown that Tpd is always Thold + something. So it 'encapsulates' the hold time. So once Tpd is considered in calculating Fmax, hold time is automatically taken care of.
If you consider a hypothetical situation where Tpd is less than hold time, then Fmax will be calcualted using thold as well. But this is not possible in a normal circuit of a flip flop.
Hence hold time is never taken into account while calculating Fmax
Hope this helps