Max_Fanout How does it really work in ic compiler?

[oottot]

hi
I set Max_Fanout to 32. But if I do CTS and look at max_fanout, the max_fanout count is over 32.
Why is the max_fanout count set to 32, but it doesn't work?

 

[ThisIsNotSam]

I am not a heavy ICC user, but I assume there are different settings for CTS max fanout and logic max fanout. Maybe you are not setting the right one.

 

[navpics1]

Here are my 2 cents,
First Goal of CTS is to build clk tree with min skew & optimal Insertion Delay (ID), EDA tools always tries to achieve primary goals at the expense of DRC (max tran / max cap / max length / max fanout / short etc ) costs. so, please review your CTS skew & ID targets. some time even floorplan issues like Narrow / blocked channels for CTS buffer placements also affect QOR