pankajpc
Junior Member level 1
1. Would you know of any method or technique for jitter budgeting for PLL in Tx and PLL & CDR in Rx from point of view of circuit design.The RX PLL & CDR Specs should also include the clock tree.
2. THE ABOVE MENTIONED REQUEEST HAS TO BE PERFORMED THROUGH A MATLAB CODE.
2. THE ABOVE MENTIONED REQUEEST HAS TO BE PERFORMED THROUGH A MATLAB CODE.