what is the main cause of leakage as we go down the node.
I have see the normal and low leakage libraries in 55nm node where the L of the transistors in low leakage libraries are doubled as compared to the normal ones.any idea how that helps?
Impact ionization (field sum, horizontal field Vdd/L and vertical
Vdg/Tox, both of these "engineered to the bone" as foundries
try to make scaled devices manufacturable.
L is your only degree of freedom, given a fixed process flow
and working voltage.
Yup tru ..but how would increasing L decrease the leakage ??..my undersatnding is that as we incresase L,the gate area will increase along with a decrease inthe gate resistance which would result in more leakage.
The low leakage libraries i have seen have larger L compared to the normal libraries
The lateral field component for given Vds is cut (say) in half. The
vertical (Vgs) is unchanged. Your field vector sum is reduced
by some amount less than 50% (depending on the relative
values). The leakage current probably responds exponentially.
Gate leakage from tunneling might or might not be significant.
This would track gate area, but net leakage is probably
still improved.