lokesh garg
Member level 5
LVS error
i m having a problem while doing LVS check. i made a layout of op-amp in UMC 180nm technology library, in whivh there are two separate pins gnd and vout in my schematic but in layout it is showing both of them connected, thats why it is giving error in LVS check. plz tell me what is the reason behind it...... thanks
i m having a problem while doing LVS check. i made a layout of op-amp in UMC 180nm technology library, in whivh there are two separate pins gnd and vout in my schematic but in layout it is showing both of them connected, thats why it is giving error in LVS check. plz tell me what is the reason behind it...... thanks