LVDS tx at 1.8v supply - tfall and trise problems

[haribabu]

LVDS tx at 1.8v supply

Hi ,
I am designing a LVDS tx at 1.8v supply voltage .Since at lower voltages the headroom available for the upper current source is less , i used normal current mirror at the top and cascode current mirror at the bottom . The problem now is i am cing my rise time to be faster than the fall time and these two values differ almost by 30 to 40% of thier absolute values .For example if my trise is 60ps then my tfall is around 100ps . Can anyone suggest some good solution to avoid this issue ?????????

 

[AdvaRes]

Re: LVDS tx at 1.8v supply

Hi ,
I am designing a LVDS tx at 1.8v supply voltage .Since at lower voltages the headroom available for the upper current source is less , i used normal current mirror at the top and cascode current mirror at the bottom . The problem now is i am cing my rise time to be faster than the fall time and these two values differ almost by 30 to 40% of thier absolute values .For example if my trise is 60ps then my tfall is around 100ps . Can anyone suggest some good solution to avoid this issue ?????????

What about the clock signal ? Have it the high level and low level pulse width equal ?

 

[haribabu]

Re: LVDS tx at 1.8v supply

hi ,
The pulse widths for the clock are equal !!!!

 

[bharatsmile2007]

Re: LVDS tx at 1.8v supply

Hi,

Can u pls expalin me the what is " Common Mode offset vlotage" in LVDS?

Thanks

 

[haribabu]

Re: LVDS tx at 1.8v supply

Common Mode Offset voltage is the deviation in the Common mode voltage from its typical value (i.e 1.25 v )

 

[stuck_adc]

Re: LVDS tx at 1.8v supply

check the current? ( of source and sink) are they equal.

 

[haribabu]

Re: LVDS tx at 1.8v supply

I checked it ..They are almost equal .I c only 100uA difference between them ..

 

[stuck_adc]

Re: LVDS tx at 1.8v supply

is it prelayout or postlayout.
if postlayout then check the parasitic cap present at nodes between switches and current sink/source.
if prelayout check the operating region for all the switches and their sat. margins.