I am working as EM specialist with a PDK team (SiGe BiCMOS with fmax 450 GHz) and believe there is no simple answer.
Workflow: All this needs to be LVS-clean also, and not break the design/verification flow. We have some EM-based models, e.g. for inductors with/without center tap, where the user can provide his S2P/S3P EM data. But for other elements where the PDK has no predefined EM black-boxes, using EM-based data is really difficult to implement without breaking the flow.
Accuracy, stability, convergence: In 25 years in EM support, I have seen too many bad models created by chip designers. RFIC designers are usually not EM experts and don't know the tricks to get really accurate EM data. In addition, the solvers results might create non-passive, non-causal data in some cases (think of small inductors where return loss is near 0dB), which blow up your Spectre simulation. Converting S-params to robust Spectre models which internally fix all these issues has been a major task in RFIC EM simulation for many years.
You mentioned resistors, that is one case where I strongly recommend EM users in "my" PDKs to use lumped models from the PDK instead of trying to EM-simulate them. They want to EM to get parasitics (frequency range > 200 GHz) but you would need very deep understanding of the technology cross section to get the stackup details right in that location. EM stackups in PDK provide metal stackup but exclude stackup information in the resistor region, so users would be onm their own.
Another issue: How would you handle tolerances/corner simulation when switching to EM-only models for all components? It would not be enough to EM-simulate the nominal layout with nominal material properties.
I think the present workflow of using PDK models with a few selected EM blocks of critical routing is appropriate at 30 GHz, and avoids a lot of trouble that you might have with EM data.