[SOLVED] LTspice can't detect steady state

[SherpaDoug]

I think I have some nasty ringing on a power bus, so I downloaded LTspiceIV and drew up a circuit with a transient current source, a couple of capacitors, inductors, and a load resistor, no semiconductors involved. But when I try to run the simulation I get Spice Error: "Don't know how to detect this circuit's steady state."

I haven't used Spice in 10 years so consider me a newbie. I Googled free spice and LTspice seemed well recommended. Maybe it is not the right tool for this simple circuit?

Can I get LTspice to run? Should I use another program?

 

[keith1200rs]

Add a resistor from L1/C2 junction to ground. A very large value should do.

Keith.

 

[SherpaDoug]

I added 1K resistors from each end of C2 to ground and it didn't help.

 

[keith1200rs]

Hmm - it fixed the singular matrix on my simulator. Other things to try are large resistors from each node to ground and skip the DC bias point calculation (I am not sure of the syntax for that in LTspice - it might be UIC at the end of the .TRAN). You could also add initial conditions to each node. You could also add series resistors to each ideal device.

Keith

 

[SherpaDoug]

I get the same problem with nothing but the current source to GND and a parallel 1K resistor and 100pF capacitor. The circuit has two nodes! I must be doing something very basic wrong.

My old P-spice is on 5" floppies. If I dug out an old drive it probably wouldn't run on Win7 anyway. Unless someone who specifically knows LTspice can help I guess I need to look at other spice implementations.

---------- Post added at 17:45 ---------- Previous post was at 16:54 ----------

Could someone who knows LTspice make me a file with a switched source (any kind) into a simple RC or RLC to ground that will properly simulate? If I had that I could probably morph it into what I need one step at a time and also find out what I am doing wrong.

 

[keith1200rs]

I don't know what the "steady" is on the transient analysis line - have you tried without that?

Keith.

---------- Post added at 23:13 ---------- Previous post was at 23:06 ----------

OK, I have just downloaded LTspice and installed it. The "steady" means "stop the simulation if a steady state is detected". As you aren't expecting a steady stated and it is a transient situation, it never finds one. Simply remove it.

Keith.

---------- Post added at 23:26 ---------- Previous post was at 23:13 ----------

PS.

Also, look up "STEADY" in the LTspice help. It explains what that command is (it is specific to LTspice) and why it isn't relevant to what you are doing.

 

[FvM]

The steady state point is a special feature of LTSpice for SMPS simulation, but not suited for all kind of circuits.

 

[SherpaDoug]

There is a "stop the simulation if a steady state is detected" checkbox, but checked or unchecked it seems to have no effect on this problem.

I think I will move on to another spice. Winspice looks worth a try. It doesn't have graphic schematic capture, but I don't need that for this simple project.

 

[v_c]

FvM is absolutely correct. The "steady" command only works with switching power supply models supplied by Linear Technology. These models use a proprietary modeling scheme which "understands" this command. The best you can do with your circuit is to run the simulation and observe the behavior and plot the last few periods by using an appropriate value for the "Time to Start Saving Data" item in transient analysis.

Best regards,
\[v_c\]

 

[SherpaDoug]

The problem is getting the simulation to run at all. I click "run" and the error window pops up. The output file just has the error in it. I'll try Winspice in the morning.

 

[v_c]

Are you still trying to run that circuit that you originally posted? If yes, I am going to give it a shot and will let you know what happens. From looking at that circuit, I think the simulator is going to have issues finding the operating (equilibrium) point for this problem since there is no dc path to ground. All nodes should have a dc path to ground (at dc, inductors are short and capacitors are open). When you do this, you note that some nodes are floating -- this is the reason why you might be running into a problem.

Best regards,
v_c

I can run your circuit without any problems, the currents in the capacitors and inductors are oscillating at about 9kHz.

 

[FvM]

As explained, the "no steady state" message isn't an error. Which errors do you get when deactivating the "Stop simulation if steady state.." option.

The original circuit is simulating in my LTSpice version 4.11s, surprisingly also without a resistor. This is due to zero current a time 0, I think. But an infinite Q circuit isn't a reasonable simulation setup, the result depends too much on non-ideal simulator behaviour. I also don't understand the relation of the pure current source driver to a real circuit problem.

If you can provide a more realistic circuit that still has problems in simulation, please show. Posting a zipped .asc file eases reproduction of the problem very much, by the way.

 

[keith1200rs]

I don't see how you are still getting the same error if you have unchecked the "STEADY" option. Here is your circuit with the STEADY option unchecked and it runs fine. As FvM says, it needs no extra resistors (SIMetrix has a singular matrix without one additional resistor).

You need to be clearer about what is happening. If you cannot get the circuit working in LTspice then I cannot see you having any more success in another simulator.

Keith.

PS

Works on versions 4.12u and 4.13q (the latest)

 

[SherpaDoug]

I loaded Keith's file and it ran fine. Then I loaded my file and copied Keith's .tran line in place of mine and that ran fine. Then I loaded my original file and IT RAN FINE!

The key seems to be the checkbox for "Don't reset T=0 when steady state is detected". If I uncheck the box above it "Stop simulating if steady state is detected" the T=0 line goes grey, but it is still looking for steady state. I have to check Stop Simulating so that I can uncheck T=0 (it won't uncheck while it is grey), then uncheck Stop simulating, to get the circuit to run.

The command "nodiscard" in the .tran line with or without "steady" causes the problem.

Thanks guys for getting me unstuck. BTW this simulation is showing the diode drop undershoot at the bottom of C2 that seems to be causing my logic board fits. With a little dampening things should work fine.