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Lowest cost automatic configuration for FPGA

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elektrom

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I'm looking for the lowest cost solution to configure FPGA instead of EEPROM. I want to share an idea with all you guys.

1. Design a front-end using low cost 8-bit MCU + serial flash memory. This front-end will interface PC with serial port. (>57.6Kbps)
2. Design MCU firmware to support atleast 3 simple operation
2.1 Direct configure to FPGA: Treat FPGA as a slave and send clk & data to it.
2.2 Upload to serial flash: recieve a configuration contents and save to serial flash
2.3 Self-powerup: If no req from PC during power-up, MCU will configure FPGA automatically by using data from serial flash.

**
- Use a Serial flash to reduce pin-count
- A serial flash should big enough to keep all configuration bit

How about yours idea??
 

drwho78

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That idea is possible, but I don't know if it is low cost. If you plan on storing the configuration in serial Flash, you will need about 4 of them at about $3 each in order to accomodate the Xilinx Virtex II family. The largest Virtex II requires 29M bits whereas the smallest requires 360K bits. The largest serial flash I found is 1M bytes.

I think the cheapest solution is to use a download cable from the PC. The next cheapest solution is to use a EEPROM and a PLD that will read the configuration from EEPROM and programs the part.
 

Jayson

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Why not just use an SPROM? Are they too small to fit some designs on?

Can anyone recommend a MCU + serial flash combination that could do the trick? Would a PIC or AVR suffice?

- Jayson
 

Hero

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Hi,

I saw in one Altera applicaton note FPGA configuration and ISP programming using parallel EEPROM and EPLD for stream conversion.

I am not sure but I think that this is not cheap solution because you need at least one ALTERA 7032 or 7064.

But maybe you can consider baterry backup SRAM instead FLASH or EEPROM + uC or GALs or cheap EPLD.

Maybe you can consider and this combination cheap 8031 + cheap 64K x8 EPROM 27C512 or 32K x8 EPROM 27C256. You can store program code and FPGA data in this EPROM and use MOVC instruction to fetch configuration data from program memory.

If you use baterry backup SRAM instead EPROM you can use 8031 serial port to download FPGA configuration to SRAM
 

cdcll

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I think one of the cheap way is the combination of cheap 8031 + cheap EPROM(or cheap Configuration Memory) plus configuration data compression. Usually you can cut down about 1/3 of configuration data size if you use suitable compression method.
 

zoovy

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Do you have other concerns such as security, saving dual configuration and load the latest verified code?

What is the size of the code?

The reason I am asking these questions is to find out the size of the FPGA and additional functionality you want. Do you want that RS232 port to come out? Or is just the TTL level RS232 sufficient?

On the reccomendation side check TI MSP430 family. It has some neat features which probably reduce the price such as built-in clock generator which requires NO external components,

http://focus.ti.com/docs/prod/productfolder.jhtml?genericPartNumber=MSP430F133
This is a 64 pin TQFP package roughly <$3 part. (Assuming you are going to use Parallel flash.)
If you are going to use serial flash then try the smallest of the family.

http://focus.ti.com/docs/prod/productfolder.jhtml?genericPartNumber=MSP430F1101A
This is ~$1 in 1K qty prices. 20 pin device for using serial EEPROM/Flash.

Another cost saving would be to use resistors, diodes and caps to generate PSEUDO RS232 port instead of using RS232 chip. (protect the input via resistors and clamp diodes if supply is going to be floating totally.) If you want total absolute minimum cost in RS232 conversion you can make the interface simplex(download to the cpu only and no TX). Maybe a single LED will do the visual response. How thrifty you want to be?
 

brmadhukar

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Hi,
If you are using any processor with FPGA like Xilinx, (signals : Init, progb, din, cclk) the processor may be able to provide the required signals to FPGA(of course it requires flags / ports). I have used this to configure FPGAs.
BRMadhukar

PS: Keep the CCLK timing low in the beginning
 

zhangyong

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I think cpld + Flash and mcu + flash to configure fpga are both cheap methods
 

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