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Low vs high frequency question (EMCwise)

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nikeplato

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Hello all,

I read in several books, that decreasing frequency is a general principle to improve EMC for a module (i.e.: use the lowest bus frequency the microcontroller could do the job). Now somebody is telling me it's not necessary that way. Could anyone give me some examples of improving EMC by increasing frequency?
Specifically I reduced clock frequency (some 100s KHz) of some SPI interface (between micro and some driver), 4 times, being sure I've done a good thing, EMC wise.

Thank you,

nike
 

nikeplato

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Hello again,

Reading in the Clayton Paul's book "Introduction to EMC" I found one possible reason why somebody would want to have higher frequency instead lower. Say there are 2 bus lines on the board, both with 10 MHz freq. In that case there will be two harmonics from each line at 20MHz, 30MHz, etc., and the amplitudes of the harmonics will be adding increasing noise. Suppose none of the frequency could be decreased because of functional reasons. Then we would prefer to increase one of them to say 15 MHz, and have the harmonics not addind each other.
Does anyone have any other idea/experience?

Thank you,

nike
 

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