Low latency integer divider..

[titanic]

Hi,


Im am trying to implement a binary divider with verilog . But conventional methods are too slow for me..

Does anybody know an algorithm eligible for low latency (2-3 clocks) binary diviision which can be pipelined....



thanx in advance

 

[FvM]

What do you consider as "conventional methods"? A usual fast parallel divider, as provided by the math libraries of most synthesis tools should work.

 

[titanic]

I meant shift and subtract divisions.

It is the thing. I cannot use a library. I will do it all by myself...

 

[FvM]

Look for fast binary division, booth algorithm.