Low frequency operation of D flip flops

[parkpika]

I have a transmission gate flip flop with NOR gates for set/reset . In simulation, this flipflop works fine at high frequencies ~10MHz but when I clock it at 100 kHz, it starts to fall apart. Does transmission gate FF not work for frequencies below 100 kHz?? I'm using 90 nm cmos.

 

[FvM]

The critical parameter is clock rise time, not frequency.

 

[axcdd]

Do u use standard static FF or dynamic FF ?

Dynamic FF wont work on low frequency's because gate capacitors will discharge.