Looking for someone to discuss about the OpenRisc1000

[Ansunamu]

Does anyone who already tried the OR1K of opencore ? If you do , could you share the experience to all of us

 

[sgrudu]

I'd like to hear experience about Open RISC 1000 Core too !
Recently I've talked/asked here about @ltera n1os and x1linx M1croblaze but I forgot
to mention this core which seems very promising..
It's free, it has a free working toolchain (gcc , gdb etc..) and a free operating system
running on it (uCLinux). And there are lots of interesting free open cores ready
to be interfaced with it (like ethernet core which has been tested with it yet).
I'll try it as soon as possible !

If someone tried it please answer

Greets,

sgrudu.

 

[Ansunamu]

I am trying to make a FPGA board

Which FPGA model is sutable for OpenRISC1000 including some peripheral like USB Ethernet ......etc

Currently , i have VirtexE 1000 . Do i need to order a biger one

 

[chesterkuo]

I am interesting!!

I am interesting in this project.

Which one part do you need to discuss??!!

 

[marsgod]

Maybe need a tool or plateform that can quickly integrate the OR1200 with other open cores.
Then we can develop a SoC quickly.

 

[ntxp]

This core has little documentation to start with, when compared with LEON2 or others. Therefore, you have to prepare to try and error before you could target it on your platform.

They prefer Xess XCV800 but I think it is trival to target on any Xilinx devices with sufficient LUT.

ntxp

 

[Ansunamu]

Need a plateform to test and verify the OR1K

Need a plateform to test and verify the OR1K and that what i want to do first . If all of us can get the plateform , we can develop the application and modify the core to connect to real world .

Does someone know about how to run the simulation of the OR1K . Because i can not find the related imformation about how to run the simulation . I even dont know how to setup it .

 

[Ansunamu]

Seems not many people had tried about OR1K

Seems not many people had tried about OR1K . I will try to run the simulation and make a FPGA board first without RTOS

How about you guys ? Do you plan to do something ?

 

[sgrudu]

Yes I want to work with it. But have not
much time now.
I would implement it on the m*emec Sp@rtan-II 200 board with ethernet and serial core from open cores too..
but I didn't check if that would fit in a sp@rtan-II 200.
Let's use this topic in the forum to keep in touch on progress we make
Bye,

sgrudu.

 

[mosalem2003]

Dear Friends,
I'm one of the founders of a new Open source HW/SW IP cores organization which has a strong relation with opencores.org and Damjan Lampret the Open RISC deisgner. Our Pilot project is a PDA which has the OPen RISC as its core processor. We have have ported the processor to ALtera. Whoever is interested to join us please email me ...I'd like to build a community of people who are professionals in our field.
My Yahoo messenger ID is : mosalem2003

My email is : mosalem2003@yahoo.com

Thanks . waiting for you guys..

Best Regards,
Mohamed Salem
Senior Hardware Design Engineer