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The sugestion is easy to say and dificult to follow (in some cases).
You must use correct impedance (typicaly 50 ohm), no 90 degree corners, enought distante to minimize coupling, good substrate (depends on aplication),....
But I can't remenber now any book. If you tell us more about your problem, LNA amplifier, power amplifier, antenna, pll,... frecuency may we can give you some clue.
Another factor is to route the circuit signal flow so that high level signals are far away from low level signals to prevent contamination. A straight line path is the best.
We have a project about RF circuit design( I mean RF IC design,not pcb).
We must tape out this IC, so we must do backend layout. And I want to know some good experiences or suggestions about RF IC layout.
watch you sub-ring for isolation
watch power and gnd line for each block
watch signal line far the PA big power noise
watch your vdd -- gnd protect
good floorplan will have good performance
Depending on the frequency of operation you must choose the PCB substrate.
Normally upto uhf range FR4 is good.
If your circuit contains power amplifiers and local oscillators, their grounding and shielding will have a remakable effect on overall performance of the system.
If you are doing multi layer PCBs, near oscillator region select ground layer distantly placed (in case of microstrip ) and so you get a better Q and better phase noise.
If you have some specific doubts , please ask.
thank you
it denpends on what you want to design. You can first circuits smulation by eda tools, such as ADS, Cadence..., then use the layout tools: Cadence, Ledit...
first of all, you must make sure what frequcy band you want to use.
I never did the RF/analog layout before, All I have is the book "the art of analog layout". I think this kind of textbook is just too general. And I did search in google for RFIC layout, but little valuable was found. So, does anyone here have any specific materials on RFIC(or LNA) layout??
Till now I have not yet find many materials specificly for RFIC or LNA. Searched for them for a long time.
But if u just begin, check **broken link removed**
And there is a file called consistent layout techniques for successful rf cmos design on line.
You could search for it.
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So, does anyone here have any specific materials on RFIC(or LNA) layout??
