Comparator Design
1) I sent u the circuit for example. Iref=10uA, Tp~60 us, Vdd=5V+/-10%. U can remove input stages with common emitter, they form input inpedance, and replace bip tr. by mos tr. U can remove pos. feedback capacitor and load of diff. stage for decrease Tp value. U can remove pos. feedback that form threshold.
2) Precision - 0.1mV. What do u mean? Voltage gain or offset? If offset than u need bip. tr as input tr. in diff. stage (Bip or BiCMOS process).
Good luck