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Looking for Lattice compatible download cable for Jtag board

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Buriedcode

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Hi,

I've made a design involving nothing but lattice chips (Mach4A5-64/32), and I don't have a download cable, nor can I afford one. :(

I used these chips because they were the only ones avilable to me at the time and now I'm completely stuck. :cry:

I've downloaded the free software from lattice's website, including the 'download' software (ispVM). I really don't have time to change device to Xilinx or Altera, that would involve getting new software and buying new chips, a can't afford that either. If anyone has a schematic for a lattice compatible download cable, for Jtag, I would be greateful. I have built one, the schematic of which is from a website that no longer exists (lattice probably shut it down :x ) and it uses the standard buffer interface, 74HC244. Do you think it works? Not a chance, nothing :!: . the software refer's to it as a 'model 300' but constantly says the power is not on. I'm using a 5v regulator and a 9v battery to power the programmer (because I have a socket on the programmer board for the chip). If anyone can help, or at least tell me what Jtag programmers (Xilinx, Altera etc.) will work with the lattice software.

Regards, a man on the edge of dispair,

BuriedCode.
 

lattice download cable schematic

And the cable here?

hxxp://lea.hamradio.si/~s57mmk/utils.htm
 

lattice parallel port jtag cable

Hi davorin,

That was a swift reply there! 8O

Thankyou for the link, I don't know how you found it because I've been looking for a lattice compliant download cable schematic for months!

The schem is different from mine, but thats probably because the one I've got is wrong.

My version of the programmer has 2 logic chips, I think its desiged for use with Jtag AND lattice isp. But I'm just wasting my time with the one I've built. I'll start from scratch and build the one from that link, as it seems to be a later (and hence, more reliable) version.

Thanks again devorin,

BuriedCode.

Ps. If you haven't built it, I could inform you if it works or not, if your interested.
 
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    buliga

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lattice jtag cable

Well...just searched in google for "lattice isp schematic" (o;

BTW: Have an original isp cable which I used for ispLSI1016 devices...back then also JTAG was used to program them...

If a cable isn't correctly recognized then it's mostly because of some feedback connection missing...which detect cable version or voltage presence...


Some feedback would be nice...otherwise I'll try to de.engineer my original cable (o;
 

lattice isp cable

Well, I can't believe I didn't find it, mind you, I haven't slept in a while :?

I remember the ispLSI, I used it when I was at univeristy, I think the schem I have (again, I don't have the url) IS the one used for the ispLSI1016, since it can program both isp and Jtag devices. I'll attach it to this post, it didn't work for me, but then again it could have errors. I think the connection to the parallel cable it a bit 'iffy'.

I'm prototyping the new programmer now, should have results by tomorrow.

BuriedCode.
 

lattice isp schematic

ISP Programming Cable pages from the Lattice ISP Programming Manual, containing schematics:
 

lattice jtag

Hi, thanks for the schematic, I've searched through a few of their manuals but I obviously overlooked it :).

I am having real trouble getting this chip programmed, I've got the latest software from lattice, ispVM. And I've prototyped several designs, which are basically all very similar, they all have the same connections to the parallel port and simply buffer them with a 74hc244.

Maybe its a power issue? I'm powering the programming board with a 5v regulator, powered form a 9v battery, the whole circuit goes as follows:

COmputer -> Parallel cable (m-m, about 1.7m) -> Parallel female socket, soldered on pins 2,3,4,5,6,8,10,12,15,18-25. -> 74Hc244, via resisitors, -> PLCC44 Socket containing the M4A5-64/32.

I've just checked the parallel cable, and all pins are connected individually from end to end.


As for the software, the jedec file cannot be a problem, since I haven't got to the stage where its needed. The VM software detects when its plugged in (port pins 8 and 12 linked), it detects when the power is on (pin 15 I believe), but it refuses to go any further, constantly spitting out the same old line 'Programmer: Not available'.

If there is an 'easier' way, I'm all ears, I've prototyped so many different configurations, soldered the DB25 connector so many times that its melted, and the software resfuses to play ball of give any assistance.

Regards,

BuriedCode.
 

isp lattice chip programming

Buriedcode said:
Hi,

I've made a design involving nothing but lattice chips (Mach4A5-64/32), and I don't have a download cable, nor can I afford one. :(

I used these chips because they were the only ones avilable to me at the time and now I'm completely stuck. :cry:

I've downloaded the free software from lattice's website, including the 'download' software (ispVM). I really don't have time to change device to Xilinx or @ltera, that would involve getting new software and buying new chips, a can't afford that either. If anyone has a schematic for a lattice compatible download cable, for Jtag, I would be greateful. I have built one, the schematic of which is from a website that no longer exists (lattice probably shut it down :x ) and it uses the standard buffer interface, 74HC244. Do you think it works? Not a chance, nothing :!: . the software refer's to it as a 'model 300' but constantly says the power is not on. I'm using a 5v regulator and a 9v battery to power the programmer (because I have a socket on the programmer board for the chip). If anyone can help, or at least tell me what Jtag programmers (Xilinx, @ltera etc.) will work with the lattice software.

Regards, a man on the edge of dispair,

BuriedCode.
 

jtag lattice

Hey man if your problem is solved then good if not then contact me.. if you r in india then may be i can arrange a download cable to you for few days.
Bond
 

lattice parallel cable

Hi peeps,

I did indeed solve my problem, prototyped several cable designs, and a couple worked. Its all in the connections to the parallel port, which are all the same, but some have different 'loop back' connections, which means the software couldn't detect it. I'm happily loading VHDL into my little CPLD's right now.

Thanks for your help.

Buriedcode
 

Re: Lattice Jtag board

Hi there,

Will this programmer be able to program the new Lattice CPLDs/GALs? (Like the ispMACH 4000ZE, or the new ispGALs.)
They use JTAG instead of Lattice's ISP.
Could anyone support a compatibilty list? I just cannot get this answer anywhere.


Thank you!

Best regards,
Semirke
 

Lattice Jtag board

You may want to refer to the specification of the original Lattice ispDOWNLOAD cable. It can be used for all JTAG programmable devices with 3.3/5V supply voltage. The above posted programming adaptor seems to be suited for 5V operation only. For 3.3V (or lower supply voltages) a level conversion is required.
 

Re: lattice parallel cable

Buriedcode said:
Hi peeps,

I did indeed solve my problem, prototyped several cable designs, and a couple worked. Its all in the connections to the parallel port, which are all the same, but some have different 'loop back' connections, which means the software couldn't detect it. I'm happily loading VHDL into my little CPLD's right now.

Thanks for your help.

Buriedcode

Hi,

I was having the same problem as you and confused which loopback connections that would work with the ISP software. Do you know what is the loopback connections that can be detected by the software? BTW, do you have the schematic that works?
 

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