asic04
Newbie level 2
asic verification contract positions
Hi, guys,
I'm desperately looking for an ASIC design or verification job. If you know any entry-level positions in this area, could you send an email to wenlongwei@gmail.com. I wanna gain some industrial experience and don't care about the pay. Thank you in advance! Below is my resume:
WILLIAM WEI
5612 Grover Av., Apt 107, Austin, TX 78756
(817) 793-7298
wenlongwei@gmail.com
OBJECTIVE
pursue a full time/intern position in the field of ASIC verification and validation
SUMMARY OF QUALIFICATION
- MSEE focused on circuit design with a GPA of 4.0/4.0
- Skilled in logic design/verification with Verilog HDL/VHDL and FPGA synthesis
- Familiar with implementing testbenches to meet verification plan requirements
- Strong programming skills in C, C++, Perl and assembly language
- Innovative and self-motivated team player with strong technical writing and presentation skills
EDUCATION
M.S., Electric Engineering, University of Texas at Arlington, August 2004
M.S., Computer Science, Nanjing University, China, May 1999
B.S., Biology, Nanjing University, China, May 1996
TECHNICAL SKILLS
- CAD Tools: Modelsim, Xilinx, Cadence tools, Agilent-ADS, HSPICE, PSPICE and MATLAB/Simulink
- Languages: Verilog HDL/VHDL, C, C++, Perl, assembly language and Visual Studio
- OS: Windows XP/2000/NT, DOS, UNIX
RELATED COURSES
VHDL, Digital Signal Processing, Wireless Communication, Analog CMOS IC Design, Digital VLSI Design (Auditing), RFIC for Wireless System, RF Circuit Design, Semiconductor Device Theory, Random Signal and Noise
RELATED ACADAMIC PROJECTS
- ASIC design of a VGA/LCD display controller with Verilog HDL, verification with a self-checking testbench
- ASIC design of an elevator controller: logic design and test bench design with VHDL, timing simulation with Modelsim and FPGA synthesis with Xlinx
- Intel 8086 microprocessor interfacing and hardware design for a simple motion control system
- System design of a CDMA2000 heterodyne double-conversion receiver (ADS)
- A 14-bit 125MSPS pipelined ADC in 0.35um CMOS (Cadence)
- A 1.9 GHz CMOS RF front-end implemented using 0.18μm CMOS (ADS)
- A 10 Gb/s CMOS Wideband Amplifier for optical communication using 0.18um CMOS technology (HSPICE)
REFERENCES
Available upon request
Hi, guys,
I'm desperately looking for an ASIC design or verification job. If you know any entry-level positions in this area, could you send an email to wenlongwei@gmail.com. I wanna gain some industrial experience and don't care about the pay. Thank you in advance! Below is my resume:
WILLIAM WEI
5612 Grover Av., Apt 107, Austin, TX 78756
(817) 793-7298
wenlongwei@gmail.com
OBJECTIVE
pursue a full time/intern position in the field of ASIC verification and validation
SUMMARY OF QUALIFICATION
- MSEE focused on circuit design with a GPA of 4.0/4.0
- Skilled in logic design/verification with Verilog HDL/VHDL and FPGA synthesis
- Familiar with implementing testbenches to meet verification plan requirements
- Strong programming skills in C, C++, Perl and assembly language
- Innovative and self-motivated team player with strong technical writing and presentation skills
EDUCATION
M.S., Electric Engineering, University of Texas at Arlington, August 2004
M.S., Computer Science, Nanjing University, China, May 1999
B.S., Biology, Nanjing University, China, May 1996
TECHNICAL SKILLS
- CAD Tools: Modelsim, Xilinx, Cadence tools, Agilent-ADS, HSPICE, PSPICE and MATLAB/Simulink
- Languages: Verilog HDL/VHDL, C, C++, Perl, assembly language and Visual Studio
- OS: Windows XP/2000/NT, DOS, UNIX
RELATED COURSES
VHDL, Digital Signal Processing, Wireless Communication, Analog CMOS IC Design, Digital VLSI Design (Auditing), RFIC for Wireless System, RF Circuit Design, Semiconductor Device Theory, Random Signal and Noise
RELATED ACADAMIC PROJECTS
- ASIC design of a VGA/LCD display controller with Verilog HDL, verification with a self-checking testbench
- ASIC design of an elevator controller: logic design and test bench design with VHDL, timing simulation with Modelsim and FPGA synthesis with Xlinx
- Intel 8086 microprocessor interfacing and hardware design for a simple motion control system
- System design of a CDMA2000 heterodyne double-conversion receiver (ADS)
- A 14-bit 125MSPS pipelined ADC in 0.35um CMOS (Cadence)
- A 1.9 GHz CMOS RF front-end implemented using 0.18μm CMOS (ADS)
- A 10 Gb/s CMOS Wideband Amplifier for optical communication using 0.18um CMOS technology (HSPICE)
REFERENCES
Available upon request