`include"define.v"module memory_block (clk, write_enable, waddr, raddr, data_write, data_read);input clk, write_enable;input[(`ADDR_WIDTH-1):0] waddr;input[(`ADDR_WIDTH-1):0] raddr;input[(`DATA_WIDTH-1):0] data_write;// data to be written into memoryoutputreg[(`DATA_WIDTH-1):0] data_read;// data read out from memoryreg[(`DATA_WIDTH-1):0] memory [(`MEMORY_SIZE-1):0];always@(posedge clk)begin
data_read <= memory[raddr];if(write_enable)
memory[waddr]<= data_write;endendmodule
The tools can choose the implementation. When MEMORY_SIZE is low it might be possible that other resources are less optimal. If the device doesn't have distributed RAM for example, it would not be efficient to use a block ram for a small number of elements.
The tools can also be very restrictive on coding style. Perhaps the second index needs to be [0 : MEMORY_SIZE-1].
The tools can choose the implementation. When MEMORY_SIZE is low it might be possible that other resources are less optimal. If the device doesn't have distributed RAM for example, it would not be efficient to use a block ram for a small number of elements.