Logic implementation of a Digital filter

[dengreyes]

do anybody can show some basic circuits that implement a digital filter. or can suggest where to find digital filter circuits implemented in gate level.
example: what circuit represent the delay(z^-1) block in an FIR block; is it reprsented by a single flip flop...etc...

 

[brmadhukar]

Hi,
Z^-1 represents a delay and as such it does not say anything about the format of the data. If the data is a single bit (trivial case) this is a flip flop otherwise it is a register capable of accomodating the data needed to be filtered. At each clock cycle you move it to the next register.

Hope this helps,
Madhukar

 

[jetset]

Douwnload an073 from **broken link removed**[/url]

 

[dengreyes]

Can you suggest books that shows circuit design for fir filters? I want to see variants of logic implementation of fir filters. Thanks anyway.

 

[ramesh]

For Implementation of FIR filters in VHDL
See here
**broken link removed**

 

[eternal_nan]

Look up the book "Digital signal processing with FPGAs" by Meyer-Baese

 

[delay]

A simple digital filter hardware would be what your filter cascaded diagram is. That's it would consist of delays that will be implemented as single bit registers or dflops, adders and multipliers. Your intial and final blocks would be different because of inputs and output but intermediate blocks will form a basic computational circuit that will be instantiated many times and it will have same number of inputs and outputs for each stage of order.