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LOGAN18: Logic Analyzer based on the 18F252(5)
PicLA: a very low cost Logic Analyzer
Web Address :
https://pe1grl.khds.nl/picla/logan18.htm
https://pe1grl.khds.nl/picla/picla.htm
https://pe1grl.khds.nl/picla/piclapc.htm
USB Version :
RS232 Version :
This page describes a very low cost logic analyser using an 18F2525 PIC microprocessor and a PC. The PIC is used as a hardware capture device which monitors the datalines and records all changes. The buffering, triggering, interpretation and display is handled by a PC program running under Windows. The analyser can operate in a "Fast Sampling" mode, in which the data is sampled into an internal 1K buffer on the PIC and in "Normal Sampling" or "Continious Sampling " mode in which all data changes are offloaded to the PC in real time and arbritary sampling buffer size is available.
A short specification:
- User selectable sampling of 2, 4 or 8 channels.
- "Fast Sampling" at 5 MHz / 2 MHz / 1 MHz / 500 kHz, 200 kHz and 100 kHz giving resolutions of 200nSec to 10 uSec.
- "Normal Sampling" at 500 kHz, 200 kHz, 100 kHz and 50 kHz giving resolutions of 2 uSec to 20 uSec.
- 3840, 7680 or 15360 samples can be stored in "Fast sampling" mode (depends on 8, 4 or 2 bit mode)
- Also in the 500 kHz and slower rates the memory can be compressed, increasing the maximum capture time dramatically.
- In "Normal Sampling" there is no limit to the duration of the trace, the current version supports up to 50 seconds.
- A 256-Event burst buffer is used if the data lines change faster than the data can be transmitted to the PC
- PC Link limits the "average" speed of the logic analyser (The nr. of transitions that can be recorded per second) in normal mode
- Average limit for 8bit "Normal sampling": 3840 events/sec (115kBit) or 15000 events/sec (500kBit).
- Average limit for 4bit "Normal sampling": 5760 events/sec (115kBit) or 25000 events/sec (500kBit).
- Average limit for 2bit "Normal sampling": 11520 events/sec (115kBit) or 50000 events/sec (500kBit).
Limits of the current version
Processor Channels Interface Normal rate Sustained rate Avg. interval Burst Buffer Fast Rate Fast Buffer Sample Size
PIC16F252 2 RS-232 (115k) 500 kHz 11520 evts/sec 87 usec 256 5 MHz 5120
PIC16F252 4 RS-232 (115k) 500 kHz 5760 evts/sec 173 usec 256 5 MHz 2560
PIC16F252 8 RS-232 (115k) 500 kHz 3840 evts/sec 260 usec 256 5 MHz 1280
PIC16F2525 2 RS-232 (115k) 500 kHz 11520 evts/sec 87 usec 256 5 MHz 15360
PIC16F2525 4 RS-232 (115k) 500 kHz 5760 evts/sec 173 usec 256 5 MHz 7680
PIC16F2525 8 RS-232 (115k) 500 kHz 3840 evts/sec 260 usec 256 5 MHz 3840
PIC16F2525 2 USB (500kbit) 500 kHz 50000 evts/sec 20 usec 256 5 MHz 15360
PIC16F2525 4 USB (500kbit) 500 kHz 25000 evts/sec 40 usec 256 5 MHz 7680
PIC16F2525 8 USB (500kBit) 500 kHz 15000 evts/sec 60 usec 256 5 MHz 3840
PicLA: a very low cost Logic Analyzer
Web Address :
https://pe1grl.khds.nl/picla/logan18.htm
https://pe1grl.khds.nl/picla/picla.htm
https://pe1grl.khds.nl/picla/piclapc.htm
USB Version :
RS232 Version :
This page describes a very low cost logic analyser using an 18F2525 PIC microprocessor and a PC. The PIC is used as a hardware capture device which monitors the datalines and records all changes. The buffering, triggering, interpretation and display is handled by a PC program running under Windows. The analyser can operate in a "Fast Sampling" mode, in which the data is sampled into an internal 1K buffer on the PIC and in "Normal Sampling" or "Continious Sampling " mode in which all data changes are offloaded to the PC in real time and arbritary sampling buffer size is available.
A short specification:
- User selectable sampling of 2, 4 or 8 channels.
- "Fast Sampling" at 5 MHz / 2 MHz / 1 MHz / 500 kHz, 200 kHz and 100 kHz giving resolutions of 200nSec to 10 uSec.
- "Normal Sampling" at 500 kHz, 200 kHz, 100 kHz and 50 kHz giving resolutions of 2 uSec to 20 uSec.
- 3840, 7680 or 15360 samples can be stored in "Fast sampling" mode (depends on 8, 4 or 2 bit mode)
- Also in the 500 kHz and slower rates the memory can be compressed, increasing the maximum capture time dramatically.
- In "Normal Sampling" there is no limit to the duration of the trace, the current version supports up to 50 seconds.
- A 256-Event burst buffer is used if the data lines change faster than the data can be transmitted to the PC
- PC Link limits the "average" speed of the logic analyser (The nr. of transitions that can be recorded per second) in normal mode
- Average limit for 8bit "Normal sampling": 3840 events/sec (115kBit) or 15000 events/sec (500kBit).
- Average limit for 4bit "Normal sampling": 5760 events/sec (115kBit) or 25000 events/sec (500kBit).
- Average limit for 2bit "Normal sampling": 11520 events/sec (115kBit) or 50000 events/sec (500kBit).
Limits of the current version
Processor Channels Interface Normal rate Sustained rate Avg. interval Burst Buffer Fast Rate Fast Buffer Sample Size
PIC16F252 2 RS-232 (115k) 500 kHz 11520 evts/sec 87 usec 256 5 MHz 5120
PIC16F252 4 RS-232 (115k) 500 kHz 5760 evts/sec 173 usec 256 5 MHz 2560
PIC16F252 8 RS-232 (115k) 500 kHz 3840 evts/sec 260 usec 256 5 MHz 1280
PIC16F2525 2 RS-232 (115k) 500 kHz 11520 evts/sec 87 usec 256 5 MHz 15360
PIC16F2525 4 RS-232 (115k) 500 kHz 5760 evts/sec 173 usec 256 5 MHz 7680
PIC16F2525 8 RS-232 (115k) 500 kHz 3840 evts/sec 260 usec 256 5 MHz 3840
PIC16F2525 2 USB (500kbit) 500 kHz 50000 evts/sec 20 usec 256 5 MHz 15360
PIC16F2525 4 USB (500kbit) 500 kHz 25000 evts/sec 40 usec 256 5 MHz 7680
PIC16F2525 8 USB (500kBit) 500 kHz 15000 evts/sec 60 usec 256 5 MHz 3840