Loading of bias node by transmission gate

[edinburghtech]

Hi

I have 2 bias voltages generated by a current source. These bias voltages are used to selectively bias many transistor gates. Selection is done using transmission gates. When number of transmission gates connected to this node increases, the bias node gets loaded and bias voltages falls. Any way to fix this?

Thanks

 

[erikl]

Standard fix would be to buffer both bias voltages (with gain=1 opAmp buffers).

 

[edinburghtech]

Standard fix would be to buffer both bias voltages (with gain=1 opAmp buffers).

Thanks erikl. I agree to your solution. However this involves including an opamp stage in between. Any tips on FET sizing in transmission gates to avoid loading?

 

[erikl]

I think you can use minimum sizes - if no timing problem.

As it's just a unidirectional switching matter, I think you can get along with 2 nfets per TG only.

 

[edinburghtech]

I think you can use minimum sizes - if no timing problem.

As it's just a unidirectional switching matter, I think you can get along with 2 nfets per TG only.

Hi Erikl

Thanks for the reply
This solution might work, however i am not sure if using minimum size TGs will have any other issues.
Any ideas here?

Thanks
Edintech

 

[erikl]

Depends on the load impedances. If these are just gate inputs, minimum sizes probably would be enough - if the timing fits. Try it!

 

[Vivek Roy]

Can you please share the schematic?