list all the standard cell of the library using Design Compile

[Haider Muhi Abbas]

I want to list all the standard cell of the library using Design Compile?

I used prefer command but still there is some cells rather than NAND2X0 in the design
so I think I need to use
set_dont_use

but I have to know the list of cells of 90nm from Synopsis

is there command to list that or I have to find them in the manual?

Thanks,
Haider

 

[jbeniston]

You can use the report_lib command.

Type 'man report_lib' for help.

But why do you only want NAND2X0 cells? That would be terrible...

 

[Haider Muhi Abbas]

You can use the report_lib command.

Type 'man report_lib' for help.

But why do you only want NAND2X0 cells? That would be terrible...

I want to use only NAND gate it is ok if NAND2X1 or NAND3...

I want to avoid using NOR or OR these with series pull-up transistors.

the reason why I want this is seeking for simplicity to measure path delay from gate level delays while OR-gates have stacking effect.

so I want to find the critical path in gate level in simplest representation then I need this in my work...

Thanks
Haider

 

[kumar_eee]

You can use the following command in DC.

get_lib_cells */NAND*