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LINK-28 warnings, dc_compiler

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TonyLS

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I'm getting a lot of (dc_compiler) LINK-28 warnings when compiling a design that uses system verilog interfaces. The warnings are related to interface pins and states: "output or Input port is not being used according to it's stated direction" The port it is referring to is in a submodule, not a top level port, and connects to an sverilog interface. Everything looks fine after inspecting some of these warnings/signals.

Has anyone seen this? Any suggestions?

Thanks
 

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