Level shifter in design

[wipshami]

Hi All,

My IO has an output voltage 2.3v-3.3v and the design needs constant input 1.8v. Anybody can suggest the levelshifter methodology that can be used?

Any inbuilt levelshifter available ? or we have to design them in virtuoso ?

Thanks

 

[imbichie]

I think you need a voltage divider ckt by using resistors,
I had faced similar scenario while using lattice LCD Pro Evaluation Kit with ECP2 FPGA and I added a resistor for voltage divider

 

[BradtheRad]

Since you want regulation to 1.8V...

A plain red led might do the job.

These simulations show how you could (a) dial up to 1.8V in case the led has too low a threshold, or (b) use a resistive divider across the led in case it is too high.

 

[wipshami]

thanks for the help