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VIP -> Verification IP, say you wrote a good piece of code (say in Vera, SystemVerilog etc.) for AHB interface that does:
--> generate AHB transactions
--> Monitors activity on DUT lines and captures outgoing transaction
--> Monitors DUT for any AHB protocol violations
--> Collects and reports functional coverage
and may be more.. That piece of code is technically speaking re-use able in all designs using AHB (It requires careful planning and architecture of the IP though). Such piece of code is often referred to as VIP. So if you want to develop VIP, I recommend you take a look at available ones to start with:
--> Synopsys has several VIP as part of their DesignWare
--> Opencores.org has several designs that comes with some testbench, think of making them into VIP.
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