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Leakage inductance of 3kW LLC converter transformer?

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treez

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Hello,
We are designing an offline (230VAC) 3kW, half bridge LLC converter (battery charger) The LLC stage has an input voltage of 340VDC to 435VDC. [f(resonant) = 100kHz]
Its output voltage is 300-400VDC.
We must use an PQ3535 ferroxcube (3C90) transformer. (we are using a gap so it has AL = 1600). We cannot use any bigger transformer due to space constraints.

The ferrite core delta B will be 450mT.

The worst case secondary current is 10A RMS. Worst case Primary RMS = 17.8Arms

In order to get the winding loss down we will have to wind the transformer as follows…
Primary = 20 turns
Secondary = 36 turns.

We need low-as-possible leakage inductance so we will sandwich the 20 primary turns between the secondary halves

So we have…
18 secondary turns (2 layers)
20 primary turns (2 layers)
18 secondary turns (2 layers)

The primary turns are litz-wound, 7 strands of 0.4mm ECW
The secondary turns are litz-wond, 7 strands of 0.315mm ECW
This means we get 7W of winding loss in both primary and secondary, so that’s 14W of winding loss total.
We are hoping that such a stack-up of turns doesn’t give us too much proximity loss.
There are 3mm margin tapes each side of bobbin.

Do you think that we can achieve a coupling of 0.998 between primary and secondary like this? We need to have at least that coupling because if the leakage is too high, then the LLC’s resonant frequency will be too low.
 

Why do you need such a low leakage? your SQRT(L/C) will be very low, have you modeled the performance with your intended Cs, Ls, Lp values? Usually for high o/p volts some Ls is beneficial... otherwise under a short the o/p current will be very large indeed (in the time before the control circuit can limit it - a few cycles, 10-15 or so)
 

Thanks,
We have a current sense transformer to detect overly high current in the resonant circuit.
As you know, our component choices are all about a compromise so we can optimise as follows….

Need 100Khz resonant frequency.
Need the peak of the gain curve to be far enough below the operation frequency so that we don’t errantly stray into the capacitive region and suffer reverse recovery of FET’s intrinsic diodes.
Need enough gain to actually provide the intended vout from the vin available

Our excel design spreasheet, checking simulations, and schem are attached...it also has a page for the pq3535 transformer wind
 

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You are of course right though to point out the low L(RES). As can be seen in the situation when vout = 300v, the L(RES) needs to be low or else the capacitive region is too close to the region of operation.

The problem is that the L(RES) is so low that the leakage inductance of the transformer could go above what is allowable for the L(RES) value. This is the big problem about this design, and as you have obviously guessed, this is why I am asking about what would be the typical leakage inductance of the LLC transformer as described in the top post.

A primary-secondary coupling factor of 0.99 gives a leakage inductance of 12.74uH which is obviously too big for this design, and makes the resonant frequency too low.

As you know, another problem of having the L(RES) this low, is that as discussed, it is on the order of the typical leakage inductance of the transformer…and as you know, leakage inductance values of mains isolated transformers can be notoriously widely tolerant, which is a big problem for this design, as we need the LC resonant frequency to be tightly defined.

The whole problem can be totally solved by simply doing a full bridge LLC resonant converter instead, and making the component values as follows…

L(RES) = 20uH
C(RES) = 125nH
L(PRI) = 400uH
L(SEC) = 324uH
L(parallel) = 500uH ..(ie parallel to the primary)

…however, this means a little bit bigger design, with 4 fets instead of two, and our investers will not allow this.
 

What are your operating freq's? 100kHz full load to 250kHz no load (short ckt load)..?
 
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we operate at 100khz as much as possible (The l(res)c(res) resonant freq)....we will vary vin to LLC stage to keep it at or near 100khz.
Short cct load we detect that and just latch off.
when we are on 2-3kw load, we will always be at or near 100khz.
We don't "do" no load...if its no load, then it just turns off and waits for a load to come on to it.

The full bridge LLC design was nicer….less rms current all round, and easier to have a bigger L(res) which the leakage inductance of the transformer did not form a significant part of. So the leakage inductance of the transformer was not so critical. But investors want small, small, small…so they want half bridge LLC.

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So yes, we will first have to wind the LLC transformer and check the leakage inductance of it..If the coupling is say 0.99, typical for an offline transformer, then we will get 12.7uH of leakage inductance, and that will mess us up bad, because it will take the resonant frequency too low, and our transformer wont cope with the extra magnetising current. –And we wouldn’t be able to just reduce the C(res) because then we would be operating too near the “peak of doom”, ie where it suddenly goes into capacitive region when you go less than it in frequency, and our fets diodes would reverse recover and blow us up.

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We saw one competitor had used foil winding as wide as the former, and we thought this was because of conduction loss, but now we think its because you can get less leakage inductance with foil windings

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It’s a shame because we could have this job done and dusted with a full bridge LLC, but they wont let us because of the two extra fets…I wouldn’t mind betting the reduction in heatsink requirement for a full bridge llc would make it smaller in the end anyway
 
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half bridge is unusual for 3kW for an LLC, bigger fets are slower and have increased turn off loss...

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ideally you will need SQRT(Ls/Cs) ~ 1.5 x load Z, seems odd not to vary the freq for regulation 100kHz to 250kHz is a typical range...
 

"340VDC to 435VDC. [f(resonant) = 100kHz]
The ferrite core delta B will be 450mT."

I marked up the 3C90 data sheet with a point at 450mT and 100khz. Is this what you meant to say?
 

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Thanks, that's right, peak is 225mT.
I am sure half bridge is unusal at this power, but our competitors are doing it, and thus so must we, so it has been decreed from above. The full bridge LLC design I presented has been scrapped by them in favour of half bridge llc.....2 less fets.
 

I hope your turn off gate drive is up to it....!
 
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Is this monkey see monkey do! As long as it fits in the package meets cost and spec who cares what it is.
 

its just that we have seen a lot of attempted half bridges at this power level - at 3kW and say 350V from the booster the rms current in the fets is 20A (when on), so 40-50A fets needed for low losses, everything becomes critical in such a design, really suited to a PE engineer with at least 5 years experience in LLC...
10A rms in the rail splitting caps, 20A rms in the series res cap, and in the series res choke, and the Tx primary,
any series L in the fet loop to the rail splitting caps will give additional turn off losses and high dv/dt across the fets which may get into the booster control....
at some point (high load) you may find both the o/p diodes conducting in the dead time, then a fet turns on and the o/p diodes start hard commutating -> suddenly way more losses and RFI noise above a certain o/p current - the noise getting into everything...
there's lots of wee traps with LLC at high current...
 

I hope your turn off gate drive is up to it....!
bipolar gate drive so its +8/-8v so its a good fast turn off......decided not to use the pnp turn off with unipolar gate drive ...because we thought the bipolar gate drive would be quicker....and simpler, not needing the dc restoration circuit.
 

+8V is a little bit light for large fets, ideally +12 to +15V to speed up the turn on and get the lowest ON drop out of the fets
 
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