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Leakage inductance can ruin operation of a BCM flyback?.....if no RCD Clamp

treez

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Hi,
As we all know, when doing an offline BCM Flyback, its essential that the bias coil signal which goes to the “zero-cross” detector in the BCM controller, (to sense when its time to turn the FET back on) is not soaked in noise. However, this signal is by its very nature, a very noisy signal. It is after all, a switching node. Also, any leakage inductance in the transformer will mean this signal “bouncing” around and possibly being so noisy that it ruins proper BCM operation.

As such, it is essential to have a solid RCD clamp on the primary of any BCM flyback in order to make the zero-cross signal as noise-free as possible. (to quench all the leakage inductance induced ringing).

However, if one observes page 19 of the FSCQ1565 datasheet, one notices that this BCM flyback uses no primary RCD clamp whatsoever. -And to make matters worse, it also adds a resistor of 1nF from drain to source…..almost as if inviting the node to resonate….weird.

…….However, we also notice that this schematic comprises five secondaries. Would you agree that multiple secondaries means less overall leakage inductance, since all the leakage inductances are effectively in parallel with each other?

As such, the schem on page 19 is workable, (even though it has no primary RCD clamp) because the leakage inductance, and hence the “leakage inductance induced ringing”, is much less of a problem?

FSCQ1565 datasheet (BCM flyback controller)
 

scopeprobe

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1. The ZCD is designed to monitor the choke voltage collapsing, You can put a small RC filter on it just to limit high frequency noise effecting the zero crossing.

2. Its not 'essential' to have a RCD clamp, in some cases its actually favourable not to as RCD snubbers can create EMI due to inherent harmonics. As the natural ring frequency of the parasitics around the switching node is low in harmonics you can sometimes just overrate the switch voltage (they have a 650V Mosfet) or use a low leakage transformer design to give a smaller spike - The energy will just go to the load

3. A simple capacitor across the switch MOSFET may just be to reduce the frequency of the Ring such that its signature is outside the EMI measurement window.

4. They use capacitors around the diodes in a similar manner, this will change the frequency of any ringing and the ESR will provide some loss.

5. Its notable that their schematic on Page 19 makes no provision for EMI on any of their secondaries so will be a potential EMI problem if any of those lines happen to come off the board out of a box. If you were to copy the design you would potentially need to consider this and whether there will be additional filtering requirements needed

5. Line regulation of the outputs will be poor without a good transformer layout. Only the 24V and 125V look to have any form of regulation
 
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treez

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As the natural ring frequency of the parasitics around the switching node is low in harmonics you can sometimes just overrate the switch voltage (they have a 650V Mosfet) or use a low leakage transformer design to give a smaller spike - The energy will just go to the load

Thanks, i know what you mean by this...you are saying that energy goes to the load. Because as i am sure you well know, energy in the leakage inductance does not end up going to the load. As you know, if we have no RCD clamp, then the leakage inductance energy ends up getting burned up in the PCB traces and in the "skin" of the "skin effected" primary which has high resistance to the high frequency ringing.

Its not 'essential' to have a RCD clamp, in some cases its actually favourable not to as RCD snubbers can create EMI due to inherent harmonics. As the natural ring frequency of the parasitics around the switching node is low in harmonics you can sometimes just overrate the switch voltage
Thanks, i have heard other engineers saying this. As much as i kind of am attached to it as an idea, and find it appealing, IMHO i dont readily believe in this. I think the "natural" ring, (without an RCD clamp) ..though it appears to be a fairly nice sinusoid, i believe that the parasitic capacitances involved change their value as the voltage on them changes throughout the ring, and so the ring is actually not that sinusoidal after all.....and its also of a relatively high amplitude, because of it not being clamped, so in the end, this not-so-sinusoidal ring has a lot of higher harmonics in it which cause more EMC problems than when having an RCD clamp across the primary. Or so i postulate. I stand ready to be zapped wrong on this one. However, maybe it just a different spectrum of EMC problems that you get with either way. I think the worst thing about having no RCD clamp, i am sure you would agree, is the problem of high primary overcurrents putting much energy into the leakage, which then goes on to overvoltage the fet...eg a full load to no load transient, or a non-soft-start or a non-soft-restart...etc etc
 
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scopeprobe

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Thanks, i know what you mean by this...you are saying that energy goes to the load. Because as i am sure you well know, energy in the leakage inductance does not end up going to the load. As you know, if we have no RCD clamp, then the leakage inductance energy ends up getting burned up in the PCB traces and in the "skin" of the "skin effected" primary which has high resistance to the high frequency ringing.

I will try and rephrase.

If the leakage spike isn't causing a problem for the Mosfet Peak Voltage or Conducted Emissions then it is not essential to have a RCD Clamp to disipate the energy (this will unecessarily effect your efficiency).

The leakage spike would still be there but as relatively pure ring and the energy would just disipate. Some into the input filter, some into the output filter, some into the output load and some as radiated emissions off the transformer to name a few.

Transformer design & Power Levels is everything of course.

Transformers have interwinding capacitance so by load i mean the energy will disipate in its lowest impedance paths.
--- Updated ---

Thanks, i have heard other engineers saying this. As much as i kind of am attached to it as an idea, and find it appealing, IMHO i dont readily believe in this. I think the "natural" ring, (without an RCD clamp) ..though it appears to be a fairly nice sinusoid, i believe that the parasitic capacitances involved change their value as the voltage on them changes throughout the ring, and so the ring is actually not that sinusoidal after all.....and its also of a relatively high amplitude, because of it not being clamped, so in the end, this not-so-sinusoidal ring has a lot of higher harmonics in it which cause more EMC problems than when having an RCD clamp across the primary. Or so i postulate. I stand ready to be zapped wrong on this one. However, maybe it just a different spectrum of EMC problems that you get with either way. I think the worst thing about having no RCD clamp, i am sure you would agree, is the problem of high primary overcurrents putting much energy into the leakage, which then goes on to overvoltage the fet...eg a full load to no load transient, or a non-soft-start or a non-soft-restart...etc etc

Amplitude is the problem, to control amplitude you have to design the windings to be low leakage and if thats not possible then your either looking at damping (efficiency loss) as you already suggested or alternative topologies with better capability.

The frequency of the ring won't really change much with voltage. The only thing that really changes is the peak current going through the transformer which would typically be tracking the haversine. The peak current will be at the peak of the low line voltage so should be when the leakage spike is at its largest. From a mosfet perspective high line is more the problem to prevent avalanche of the mosfet.

Flybacks arn't great for EMI anyway due to the large switching currents, i 100% agree on this. I typically discount them above 50W and move towards interleaved or even the forward converter topology which allow for continous mode operation which allow methods to eliminate leakage by putting the energy back into the line.
 
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treez

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The frequency of the ring won't really change much with voltage.
Thanks, i am sure you would agree that when the FET switches off, (assume no RCD clamp here), the drain voltage will ring up, and as it gets higher, the Cds capacitance will get smaller. As such, the sinusoid will not be a pure sine, because the LC thats ringing is actually changing as the Vds changes. As you know, FET junction capacitances change as the voltage across them changes. As such, we dont get a pure sinusoid ring. Its got harmonics in it, due to it being a distorted sine.

Would you agree with the point in the top post that having fives secondaries gives a relatively low leakage inductance as seen from the primary?
 
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scopeprobe

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Thanks, i am sure you would agree that when the FET switches off, (assume no RCD clamp here), the drain voltage will ring up, and as it gets higher, the Cds capacitance will get smaller. As such, the sinusoid will not be a pure sine, because the LC thats ringing is actually changing as the Vds changes. As you know, FET junction capacitances change as the voltage across them changes. As such, we dont get a pure sinusoid ring. Its got harmonics in it, due to it being a distorted sine.

Would you agree with the point in the top post that having fives secondaries gives a relatively low leakage inductance as seen from the primary?

For the leakage inductance and Cds i would normally assume for them to remain fairly consistant and that they don't tend to move around. The leakage ring is normally pure. Yes, device characteristics can change slightly but not significantly enough to worry about.

I purposely didn't answer the question regarding the secondaries as thats not really my Forte. My knowledge of windings is that everything is a trade off and good primary to secondary coupling is what reduces leakage inductance. Based on this i would have said more windings would make coupling worse and therefore increase leakage inductance but i'm sure therer are people with more expertise on this to give a more assured response.
 

treez

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Theres pg 10 of this...

...which shows Cds (Coss) at 600V as 35pF......and then its 48pF at 200V

This shows drain voltage ringing when no RCD clamp used and using 128W offline flyback

...as you can see, there is a big voltage variation on the ringy drain.

>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<

All the design examples of "no_RCD_clamp" 100W+ Offline BCM flybacks with the FSCQ1565 BCM Flyback controller have secondaries with low currents (<1A).

This , i feel certain, is a pre-requisite for a 100W+ Offline flyback that has no primary side RCD clamp. Because with eg a 24V, 5A Offline BCM flyback with no primary RCD clamp, ...and you end up with primary and secondary currents like this...
(although the LTspice sim isnt simulating the skin effect here so not quite as bad as this)

Here is 120W Offline flyback pri and sec currents with NO RCD clamp on pri....(5A output)

Here is 120W Offline flyback pri and sec currents with RCD clamp on pri.... (5A output)

So do you agree really that with >1A secondary current, you really should be using an RCD clamp in an offline BCM flyback?....otherwise the ringing peaks in the current are excessive (as above) , you agree?

FSCQ1565 datasheet
AN4146 app note
 
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scopeprobe

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Thats a delta of 13pf, the effect of that will be negligible compared to the general tolerances of the transformer and its associated leakage inductance which will likely be in the uH.

Based on you first simulation your spike is approx 750V. If you are fixed with the transformer design try considering a controller that allows the use or contains a 900V switch. Assuming the frequency is not a problem for EMI wheres the problem? The energy is going to the load so you have good efficiency.

The damping will help if EMI is an issue but you burn a few watts in the supply killing your efficiency and giving yourself a thermal issue so as i said in one of my previous messages before looking to snubbers (that will cause thermal challenges) you should focus on getting a good transformer design to minimise the leakage spike or even consider a more appropriate topology if it is of significant concern.

Of course there is a use for damping but good consideration of the task up front will give you less issues later.
 

Easy peasy

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haven't read all the posts - but yes - leakage is critical to flybacks of any type above about 50W, for our 200W versions the leakage is < 500nH

for good reason. To blunt the effect of the leakage spike you really have to snubber or catch the energy on a cap and then bleed it back to the pri ( or converter to the sec side ). For our very quiet ( RFI) flybacks we have snubbers every-where, across the fet, Tx, RCD catch diode, Tx sec side - sec side diode. ( and low leakage to keep the total snubber power down )
 

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