I believe the "overall" leakage is 99.5uH, as calculated in #5 above, however, this is comprised of (99.5/2) uH in the primary and {(99.5/2) * (ns/np)^2} uH in the secondary.
That is, a 49.75uH leakage inductor in the primary , and a 19uH leakage inductor in the secondary.
I am not sure where the 6 Ohms of inductive reactance (2.pi.fsw.Llk) comes from?
I see what is meant by the primary (& secondary ) current ramping up and the effective duty cycle being somewhat less.
This appears to be the basis of the problem....the time to ramp up {dt = [L.di]/(Vin/2)} reduces the on time and thus reduces the "effective" duty cycle. Then when the current is ramping in the output inductor, it also oviously ramps up in the primary, and also in the leakage, and there is a voltage across the leakage of v=Ldi/dt.
...These two factors account for the enormous amount of "lost" volts. I don't know why I couldn't see it before, -and the tme old V=Ldi/dt euation works it all out.
I think we can conclude, that for offline half bridge converters (offline converters struggle to get k factor of trafo above 0.99 due to the isolation requirement in the trafo), the standard equation of (Vout = Vin/2 * N * D) is pretty much useless, do you agree?
..Incidentally, does any reader know why the entire input voltage (i.e. Vin/2) appears across the leakage inductor (and none across the primary) when the FET first turns on?