Leakage current issue for 555 Timer IC with PCB Traces

[AzharElectronics]

I am using KEMET make Ceramic Capacitor P/N# C1206C106J8RACTU (CAP CER 10UF 10V X7R 1206) connected to discharge Pin of SE555 Timer IC . The RC combination is to get 60Sec Output from SE55 are RA=2.7MΩ RB=2.7MΩ and C=10uF. With use of first batch of prototyping PCB boards I get SE555 Timer IC output as 68 Sec and with second batch of Production board I get output as 110 Sec. RA, RB and C values are same for all batches of PCBA. I have test results for more than Qnty 20 PCBA of production batch for same electronics 555 IC circuit the output value is not same and it ranges from 110 Secs to 179 Secs. The few difference points between prototyping board and production boards are; Prototyping boards were manufactured in 2015, used supplier 1 for fabricating boards, used Solder flux from supplier 1 and not conformal coated and production boards are manufactured in 2020, used supplier 2 for fabricating boards, used Solder flux from supplier 2 and are conformal coated. The Question I have is does these listed differences in tow batches of PCBA causes any leakage current from SE555 IC or its traces and the conformal coat has its effect on dielectric of Capacitor ? Because during testing it is seen that leakage current is causing increase in output timing.

 

[dick_freebird]

The timing depends on RA, RB and CT. Any or all of
these could have varied between board-stuffing
episodes.

Flux and other residues could be a problem, have
a memory of a whole production lot of graphics
boards going bad over time as flux grew white
conductive mold. But sensitivity depends on the
component values.

I don't think the 555 is real great at super long
pulse durations, your RA, RB could be "bent" by the
parallel impedance of the 555 pins and the base
currents of the two ramp comparators. Comparator
base current is highly variable between foundry,
lot (date-code) and so on. If your design depends
on "typical" pin leakages, and can't tolerate spec
limit leakage (per WCA) then the design robustness
is the problem.

 

[andre_luis]

According to datasheet on the above link, and assuming you are supplying the IC with 5v, you much likely have exceeded the maximum value allowed for RA+RB, which is 3.4MΩ .

 

[AzharElectronics]

Yes Supply to IC is 5v DC. As customer requirement was 60 Seconds Pulse and reducing R would have increased C so an optimum value was used for R and C. Also PCB size contains so had to use smaller package of Capacitor.

 

[KlausST]

Hi,

any simple microcontroller will do (like ATtiny9). It´s smaller, low part count, more precise and more flexible than your NE555 solution.
It just needs a very small piece of software. You may program it on your own, find someone in your neighbourhood or in the internet who helps you with this.

Klaus

 

[AzharElectronics]

Hi L

Hi,

any simple microcontroller will do (like ATtiny9). It´s smaller, low part count, more precise and more flexible than your NE55 solution.
It just needs a very small piece of software. You may program it on your own, find someone in your neighbourhood or in the internet who helps you with this.

Klaus

Hi Klaus,
The Boards are in Production so no or very little scope for proposing new change, your thoughts on variation in output due to PCB, Solder Flux and Conformal coating.
Thanks.

 

[KlausST]

Hi,

I don´t know your circuit, no thresold voltages, no currents,
...nor your PCB with trace length, distances...nearby voltage levels.

Hard to validate. Thus: maybe.

Klaus

added:
You may try to bake them. maybe 5 hours at 125°C. then let them cool down and do the tests again.
If there is no big difference, then humidity (and maybe hygroscopic residuals) is not the problem.

 

[dick_freebird]

You might look into whether any of the "CMOS 555" type
versions offer you a higher maximum RA/RB (as their input
bias current should be well less). Assuming any are still
manufactured.