Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronic Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

ldo capacitor problem

Status
Not open for further replies.

devop

Full Member level 1
Joined
Dec 5, 2006
Messages
99
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Activity points
1,973
The fig illustrate the factors which determine the stability of LDO, but I don’t know where is the Cb in a real chip ,since I read most spec of LDO,and there is only one capacitor connect to Vout.Or the Cb embedded in the chip itself??
And why don’t we concern the capacitor of load ??
and how can we determine the size of C0???
thanks
 

peterwang

Member level 1
Joined
Oct 31, 2007
Messages
33
Helped
5
Reputation
10
Reaction score
2
Trophy points
1,288
Activity points
1,436
Cb is bypass capacitor. This diagram is from Figure 2 of the book:

Study and Design of Low Drop-Out (LDO) Regulators
Authors: Gabriel Alfonso Rincon-Mora & Phillip Allen
Publication: GIT
Volume: 28 pages

The answer for your quesiton is at pp.10, you can get the book at:


http://www.ieeeclub.com/inc/sdetail/764?xtr=ldo2
 

huojinsi

Full Member level 5
Joined
Jan 21, 2005
Messages
256
Helped
25
Reputation
50
Reaction score
6
Trophy points
1,298
Activity points
2,216
In my viewpoint, the LDO structure should be the same as the picture. The output has only one large capacitor Cb, and this Cb capacitor equates the series of a capacitor and a ESR. The effect of Cb is to generate a zero and raise the phase margin of loop, so stabilize the whole loop.
 

renwl

Advanced Member level 1
Joined
Apr 26, 2004
Messages
453
Helped
27
Reputation
54
Reaction score
5
Trophy points
1,298
Location
shanghai,china
Activity points
1,807
The capacitor Co is used to reduce the low frequency ripple.

and the capacitor Cb is used to bypass the high frequency noise.
 

devop

Full Member level 1
Joined
Dec 5, 2006
Messages
99
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Activity points
1,973
safwatonline said:
On-Chip decoupling cap
I think so. but the paper said it will make the first nodominant pole 1/2*pi*Resr*Cb,how could it be ,the esr is so small?
 

safwatonline

Advanced Member level 4
Joined
Nov 19, 2005
Messages
1,347
Helped
219
Reputation
438
Reaction score
47
Trophy points
1,328
Location
EGYPT
Activity points
9,059
if it is the first non dominant pole then it is called the bypass capacitor and it used as Off chip decoupling with very low ESR and value range of about 0.1uF (ceramic), so even if the ESR is usually small, the Cb is still large.
Note: this cap is used to supply the high freq. current
 

    devop

    points: 2
    Helpful Answer Positive Rating

devop

Full Member level 1
Joined
Dec 5, 2006
Messages
99
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Activity points
1,973
thanks safwatonline,you helped me a lot,
 

peterwang

Member level 1
Joined
Oct 31, 2007
Messages
33
Helped
5
Reputation
10
Reaction score
2
Trophy points
1,288
Activity points
1,436
Cb is normally much smaller than Co. The pole of 1/2*pi*Cb*Resr refers to the situation of high freq, where Co is virtually shorted, so the Resr of Co becomes in paralell to Cb, and becomes the next pole after Co.

In fact, there are three pole/zeros in play:

po = 1/2*pi*ro*Co (where ro is the output resistance in paralell to Co).
zo = 1/2*pi*Resr*Co (note, this is a zero)
pb = 1/2*pi*Resr*Cb (this is pole, it happens when freq is high and Co becomes shorting path)

Normally in LDO, po < zo < pb, no matter your compensation is internal or external.
 
Status
Not open for further replies.
Toggle Sidebar

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top