LC tank of VCO quality factor vs frequency plot

[rty94]

Hello,

Which is the right way to plot quality factor versus frequency of the tank? Could someone describe it?

Should I simulate standalone the LC tank with a port connected to the two pins p1 and p2 of my tank via an ideal balun or should I simulate it with the whole VCO topology for receiving the right results?

Also should I define specific param for the port ?

 

[BigBoss]

You can simulate directly RLC Circuit by simple AC analysis in order to find "Unloaded[*] Q Factor"
But this one will be a bit erroneous because Active Part of the VCO will definitely load the Tank Circuit.
Plot Impedance vs Frequency Curve of the Tank Circuit and find the R Value at Peak Resonance Frequency then calculate Q as
\[ Q_{u}=R\sqrt{\frac{C}{L}} \]

 

[rty94]

Thanks! For AC analysis I will put an AC magnitude(eg 1mV) to the Vctrl source and then VF(net)/IF(current) for finding impedance?

 

[BigBoss]

Us this sample.You will know L,C and R then you can find Q.

 

[vfone]

For better accuracy, the Q-factor of an LCR circuit should contain the Q-factor model of the L and C components.
For low frequencies this would not be very important, but for higher frequencies and especially for inductors, their Q-factor could make a big difference in getting the right LCR Q-factor.
For example see the attached Q-factor of a Murata SMD size 1005, 100nH inductor vs frequency.

The data was taken from here:

SimSurfing

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ds.murata.co.jp

 

[rty94]

When I add an equivalent parasitic C from active devices, the Rp of the tank will get higher so the quality factor too. Is this a right setup for loaded Q? Should I use an ideal cap from analog lib for parasitics as to not change Rp?