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Layout techniques (Rg reduction)

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IvanTheTerrible

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The layout on the right reduces Rg by a factor of 4 by having 2 Rg/2 in parallel, how does the layout on the left reduces Rg?
 

Intutively, the layout technique on the left, is like, applying same potential to either ends of a resistor, thereby making them in parallel.
 
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