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Layout Parasatic Exctraction Filter Setting

Junus2012

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Dear Friends,

I am using the default setting of the minimum parasitic extraction values defined by Assura tool in Cadence,
the default setting for the parasitic capacitor is 0.01 fF.

Is it realistic setting or I must change it. I have invistigated the cells from my foundry and I found that they are extracting min Cap = 10 fF

by the way my target design is for real fabrication

Thanks
Regards
 

guntherleet

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especially in advanced nodes and high-frequency applications, the parasitic is significant and resolution of 10fF might be not high enough in my opinion. 0.01fF is realistic and in big designs, those parasitic accumulate very fast.
 

dick_freebird

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I'd recommend taking your most sensitive circuit
layout, and doing a series of extract-refine-simulate
with varying the minimum-c extract-filter settings, and
plot the care-about response; where things start
to change from 0.01f result, is where your real
parasitic sensitivity begins (and following where
the degradation shows first, might lead you to
some layout refinement if you identify the pcapacitors
responsible, from:to).
 

timof

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First, you need to understand the meaning of this parameter.
It is not "accuracy" or "resolution".

Assura RCX has been discontinued a long time ago, the modern extraction tool by Cadence is Quantus QRC.

In Quantus QRC, "MinC" parameter means - if a coupling between two nets is less than this value, this coupling capacitance is "decoupled", i.e. redirected to ground (or treated as ground capacitance), for both nets.

So, the total capacitance is retained, but the couplings between nets are affected.
and of course, since couplings for RC extraction mode are much smaller than in C-only mode, the effect of MinC may be quite different for different extraction modes.

Note that the regular (rule based, or pattern matching based) parasitic extraction is not very accurate - especially for coupling capacitances that are small. So, if your design is very sensitive to coupling capacitaces, or to capacitance (systematic, layout-based) mismatch - I would strongly advise to use a FS option - field solver, that is built in the extraction tools.
 

Junus2012

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Thank you friends for our help,

I lift with one question to timof,
and of course, since couplings for RC extraction mode are much smaller than in C-only mode,
you mean to say that exctraction with C only gives more realistic results (worse) than with RC exctraction?

Thanks
 

timof

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For coupling capacitances - yes, C-only extraction may be more "accurate".

But resistive and RC delay effects will be missed - so, in this sense, it is less accurate.
 

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