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layout of resistors and capacitors

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avinash

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what are the precuations should i take during the layout of poly resistors and poly1-poly2 capacitors.
 

1) matching
2) Noise couple, if the ciruit is noise sensitive. Put res, cap above well.
 

for resistors and capacitors dont forget to place dummy .

better to make capacitors in an array format with each cap in square.
 

Hi,Tianlei

Why should Res and Caps be above well if the circuit is noise sensitive? thx
 

Interconnection of resistors should be less resistive
Matching
Protection for etching effects
Separation of resistor pack from active circuit to prevent noise coupling
 

The reverse biased pn junction always isolates the n well and will not allow the noise to propogate through it thus the devices in the n well will not be affected by the noise.
 

the layout of passive devices should be very well matched.

for resistors,place dummies at the ends.this eliminates the any process variation caused by etching.
resistor interconnects should be matched perfectly.
all resistors should be kept with in guard ring .
for capacitors,
make capacitors in a array.
try to make in square .
 

1. need put dummy.
2. use unit res/cap.
 

you should consider mismatch ,stress gradients and temperature gradients.
 

ex. cap1=2P cap2=2p use double poly,unit=0.5p
plan=>
DDDDD
D1221D
D2112D
DDDDD
 

for resistor:
1. width should be large enough to reduce the impact of etching variation, but not too large to be area consuming.
2. too long L style should be changed to multiple segments with moderate length.

for capacitor:
1. be careful about the parasitic cap. Matching means equal poly caps values and parasitics.
2. metal connected onto the cap can add parasitc cap between poly and connection metal. Make sure metal connection style is the same for two caps to be matched.
3. small dummy caps is recommended to be added around the cap group.
 

Any good reference and examples can you guys recommend?
 

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