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Layout for ADCs (Analog 2 Digital conv)

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Sep 2, 2004
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PCB Layout for ADCs (Analog 2 Digital conv)

I was looking at some material on recommendations for ADCs and came across the following:

"Understanding that the primary real estate consumed on the SAR converter chip is analog, it makes sense to connect the power and ground pins on the same planes. While implementing the layout you should connect AGND and DGND to the analog ground plane. With all of the converters, the power supply stratgey should be to connect all grounds, positive supply and negative supply pins to the analog planes."

"As with SAR A/D converter, the Sigma-Delta converters can have multiple analog and digital ground and power pins. Once again, the common tendency of a digital or analog design engineer is to try separating these pins into separate planes. Unfortunately, this is a misguided tendency, particularly if you intend to solve critical noise problems with the 16-bit and 24-bit accuracy devices."

"In both cases, with high-resolutions DAR A/D converters and Sigma-delta converters you need to connect them directly to the lower-noise, analog ground and power planes"

So in ADCs we always need to connect both the analog and digital power/gnd pins to low noise analog planes? Why is that?
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It depends on the application.
How noisy is the digital GND plane? Is there just a microcontroller or a high power SPI connected?
If both GND planes are on top of each other, then consider high frequency capacitive coupling of both signals.
Then next to consider is the distance to the analog signal source. If it's not that short then differential signal wiring improves signal quality.
Sometimes there is a high density FPGA on the PCB that needs 8 layers or more, so there will be enough layers available for the analog section to route separated GND planes without additional PCB costs.

My personal tendency is to use a single GND plane with an intelligent cut to divide the noisy sections from the clean sections. Combined with an intelligent placement of signal source, signal path, ADC section and the noise source. Very short (to ADC) wiring of capacitors at signal lines and reference voltage.
But this is not a solution for every application.

Give your schematic to 100 experienced engineers and you will get 100 different PCB layouts.


Not only are there many ways of laying out these circuits (Henry Ott amongst others has relevant papers, do a search for "mixed signal layout") but if you are going to have separate ground planes then you must be aware of the noise coupling mechanisms so careful planning of the layout is a must, this is best achieved by having spate analogue and digital areas. Do not have analogue and digital areas overlapping especially power and ground planes otherwise you create one of the main coupling mechanisms for the generally high frequency noise from the digital section.

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