Laying out resistors in Cadence

[Chinmaye]

How can one calculate the sheet resistance of resistors from a foundry? Generally, why are 3 terminal resistors preferred over 2 terminal ones?

 

[Dominik Przyborowski]

How can one calculate the sheet resistance of resistors from a foundry?

Is provided by process manual.

Generally, why are 3 terminal resistors preferred over 2 terminal ones?

2 terminal resistor is 3 terminal one with substrate connected to global pin (usually gnd! or SUB!)

 

[dick_freebird]

A true two-terminal resistor is the best for common-mode
voltco, but a two terminal resistor symbol representing a
junction isolated implanted / diffused resistor is nothing
but a lie, because the third terminal (well / sub) is present
and has effect.

Thin film resistors (poly, NiCr, SiCr, etc.) have no DC path
to anywhere so no common mode voltco. Downsides
include low thermal mass and high thermal impedance
so low power handling.

A junction isolated resistor can have a reduced voltco if
the isolation region is attached to one of the resistor-body
terminals. In vanilla CMOS, unsilicided P+ in NWell would
be a low-voltco option. Whether it's better than poly would
depend on things like process control and possibility of any
application overstress that might "program" a poly link.