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Latched Comparator for cadence - 1mV 1MHz

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Hitotsu

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Latched Comparator

Hi,

Can i ask how to achieve the below specs for a latched comparator in cadence?

Currently looking at the dynamic latched comparator topology. See attached picture.

How do we size it?

TSMC18
supply: VDD,GND
resolution: Δvin < 1mV
Operating freq: >1MHz


Please help... Or any other topologies that will achieve the specs..
 

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