Large Signal Stability Analysis

[john.zhang]

Hi all,
I am designing a doubler with an input buffer. the Doubler itself is running with a bias near cut-off and using a push-push structure, while the input buffer is a simple CS structure. When I check stability, I often use the S probe in cadence environment, and the SP probe in ADS. However, as far as I am aware, these probes only work for sp analysis, which is small signal. However, my circuit's S parameters will change once the input signal is entered because of the class B style biasing of the doubler, so I would need to check stability in the large signal condition, and I was wondering how this could be done in both Cadence Virtuoso and ADS.

Thanks

 

[BigBoss]

You can try LSSP. ( Large Signal S Parameters)

 

[dick_freebird]

Is there an active closed loop amplifier present? The
description leaves me to wonder. How would instability
be expected to manifest?

My usual go-to is a transient analysis with a step-line,
step-in, step-load stimulus to inspect whatever might
ensue. Looking for critically or overdamped response
characteristic. If you are working at really high frequency
then maybe you worry about single-transistor oscillation
with the right parasitic L, C without a larger loop, tran
ought to show that if you look close enough and the
tolerances are tight enough for a small-loop oscillation
to take hold without numerical quenching. Maybe run
a FFT that could show even minuscule spurs if present,
rather than hand plotting every node to inspect? Just
find a few nodes which "ought to respond, if"?