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Large incremental resistance pseudoresistor

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Junior Member level 2
Feb 5, 2006
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Hi all especially microe ppl, i need ur help
I'm implementing large time constant filter using pseudoresistor as in figure below. After simulation the incremental resistance is in the range of tera ohm. There is no biasing current for the transistor, therefore I believe both transistors work in weak inversion region. However, my prof says that the lower transistor works in reverse bias diode configuration, therefore the current that goes through the channel is only leakage current. Is this correct? How to prove it? Pls help
thank you

mos-bipolar pseudoresistor

Hi wenadinho,

In this circuit both MOSFETS are diode connected.
The top transistor Gate is Drain symbolicaly.
But for a MOSFET's source and drain are interchangable.
For a PMOS Source is always connected to the higher potential.
So the top terminal now becomes source.
Since now Vgs = 0V the top transistor is definitely cut-off.
So only the leakage current flows, because of top transistor.

You can verify this by simulating top and bottom transistor separately.
Top transistor will not conduct. where as bottom transistor will conduct.

pseudo-resistor layout

One more, in Reid Harrison paper "A low-power low-noise ...", he is using a mos-bipolar transistor to implement such similar pseudoresistor.
This is the definition of mos bipolar:
Transistors – are MOS-bipolar devices acting as pseudoresistors.
With negative , each device functions as diodeconnected
pMOS transistor. With positive , the parasitic
source–well–drain p-n-p bipolar junction transistor (BJT) is activated,
and the device acts as a diode-connected BJT (see
Fig. 2). Each transistor was sized 4 m 4 m. For small voltages
across this device, its incremental resistance is extremely
high (see Fig. 3).
Does anyone has the cross-section of this mos-bipolar, or is it just a representative term?

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