It took me some time to realize that capital S in your formula actually means lower case s respectively jω.
It's ok to draw Vout=0 as a short, but then Iout is the current through this short and the current source should be omitted.
The simple meaning of this setup is: You are shorting the source follower output, inject a current to the input and observe the generated output current. Part of the putput current is directly fed through Cgs (the "1" term) the other part is generated by the FET conductance (the gm/sCgs term). The expression is correct under the assumption Cgd << Cgs.