Ahmed Alaa
Full Member level 5
Silicon Vision (Silicon Vision LLC. Home) requires experienced digital verification engineer to join the digital design activity. Below you can find the job description and the required skills.
Digital Verification Engineer (REF: VDE001)
Job Description
Our group offers a unique opportunity to grow your digital design skills while you assist with the development of different types of ASICs. Your duties will include Verilog/VHDL coding, functional verification, synthesis, and timing analysis.
Qualifications and Responsibilities:
Electrical Engineer with 3-5 years of experience in digital verification.
Concrete background in block and system-level verification.
Thorough understanding of the verification strategies including coverage driven, constrained random and assertion-based techniques.
Experience in Formal Verification.
Experience in VHDL/Verilog/SystemVerilog, (Verilog PLI/VPI is a plus).
Strong working knowledge of complete ASIC flow and verification phases (RTL, post-synthesis, post-layout, etc.)
Company offers:
· A stimulating, exciting and dynamic work environment, where your personal contributions to our business success will be optimally rewarded
· Room for career growth and external training.
· A competitive packages including excellent salaries, health insurance for employees and their families, bonus system and stock options
If you find yourself fitting with the above requirements, aiming for a challenging career, please send your resume to careers@si-vision.com with (VDE001) in the subject
Digital Verification Engineer (REF: VDE001)
Job Description
Our group offers a unique opportunity to grow your digital design skills while you assist with the development of different types of ASICs. Your duties will include Verilog/VHDL coding, functional verification, synthesis, and timing analysis.
Qualifications and Responsibilities:
Electrical Engineer with 3-5 years of experience in digital verification.
Concrete background in block and system-level verification.
Thorough understanding of the verification strategies including coverage driven, constrained random and assertion-based techniques.
Experience in Formal Verification.
Experience in VHDL/Verilog/SystemVerilog, (Verilog PLI/VPI is a plus).
Strong working knowledge of complete ASIC flow and verification phases (RTL, post-synthesis, post-layout, etc.)
Company offers:
· A stimulating, exciting and dynamic work environment, where your personal contributions to our business success will be optimally rewarded
· Room for career growth and external training.
· A competitive packages including excellent salaries, health insurance for employees and their families, bonus system and stock options
If you find yourself fitting with the above requirements, aiming for a challenging career, please send your resume to careers@si-vision.com with (VDE001) in the subject
